path: root/drivers/gpu/drm/i915/intel_sdvo_regs.h
diff options
authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-12 22:22:58 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-24 17:53:52 +0200
commit59d92bfa5f0cdf57f82f5181b0ad6af75c3fdf41 (patch)
tree26a3d15ec188af544f8b0b04dc3c3ee1a4deb72d /drivers/gpu/drm/i915/intel_sdvo_regs.h
parent6bd459df96ffc2488e7816c78e78bcc706c58276 (diff)
drm/i915: properly handle interlaced bit for sdvo dtd conversion
We've simply ignored this, which isn't too great. With this, interlaced 1080i works on my HDMI screen connected through sdvo. For no apparent reason anything else still doesn't work as it should. While at it, give these magic numbers in the dtd proper names and add a comment that they match with EDID detailed timings. v2: Actually use the right bit for interlaced. Tested-by: Peter Ross <pross@xvid.org> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: stable@vger.kernel.org Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo_regs.h')
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h
index 6b7b22f4d63..9d030142ee4 100644
--- a/drivers/gpu/drm/i915/intel_sdvo_regs.h
+++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h
@@ -61,6 +61,11 @@ struct intel_sdvo_caps {
u16 output_flags;
} __attribute__((packed));
+/* Note: SDVO detailed timing flags match EDID misc flags. */
+#define DTD_FLAG_HSYNC_POSITIVE (1 << 1)
+#define DTD_FLAG_VSYNC_POSITIVE (1 << 2)
+#define DTD_FLAG_INTERLACE (1 << 7)
/** This matches the EDID DTD structure, more or less */
struct intel_sdvo_dtd {
struct {