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authorBen Widawsky <benjamin.widawsky@intel.com>2013-10-04 21:24:53 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-10 12:47:08 +0200
commit5d738795968dfa8f034e5f0d30f65d362c450455 (patch)
tree1d8108947c649cc5ee45bf134904ae46281799c1 /drivers/gpu/drm/i915/intel_uncore.c
parent0b27448141bbe9da34a2fdf965dcba6f0f1b75c5 (diff)
drm/i915: Extract common MMIO lines
Just to make the churn and code duplication in upcoming patches a bit less, turn code which is common to all GEN MMIO functions into a macro. v2: Fix typo in subject Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_uncore.c')
-rw-r--r--drivers/gpu/drm/i915/intel_uncore.c30
1 files changed, 21 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 8d032aeedc4..b8b659714a3 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -341,12 +341,20 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
}
}
+#define REG_READ_HEADER(x) \
+ unsigned long irqflags; \
+ u##x val = 0; \
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
+
+#define REG_READ_FOOTER \
+ spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
+ trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
+ return val
+
#define __i915_read(x) \
static u##x \
i915_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
- unsigned long irqflags; \
- u##x val = 0; \
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
+ REG_READ_HEADER(x); \
if (dev_priv->info->gen == 5) \
ilk_dummy_write(dev_priv); \
if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
@@ -358,9 +366,7 @@ i915_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
} else { \
val = __raw_i915_read##x(dev_priv, reg); \
} \
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
- trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
- return val; \
+ REG_READ_FOOTER; \
}
__i915_read(8)
@@ -368,14 +374,19 @@ __i915_read(16)
__i915_read(32)
__i915_read(64)
#undef __i915_read
+#undef REG_READ_FOOTER
+#undef REG_READ_HEADER
+
+#define REG_WRITE_HEADER \
+ unsigned long irqflags; \
+ trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
#define __i915_write(x) \
static void \
i915_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
- unsigned long irqflags; \
u32 __fifo_ret = 0; \
- trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
+ REG_WRITE_HEADER; \
if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
} \
@@ -394,6 +405,7 @@ __i915_write(16)
__i915_write(32)
__i915_write(64)
#undef __i915_write
+#undef REG_WRITE_HEADER
void intel_uncore_init(struct drm_device *dev)
{