diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2013-07-19 20:36:54 +0100 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-07-25 15:22:06 +0200 |
commit | dba8e41f2be04de58eadf78f524b3f981bf438c2 (patch) | |
tree | bdbb2f08281a397ac7e313cb8a33ed5cc16ffd04 /drivers/gpu/drm/i915/intel_uncore.c | |
parent | 6af5d92f909796cb706f3b9efefd75cb0f5afcff (diff) |
drm/i915: Use the common register access functions for NOTRACE variants
Detangle the confusion that NOTRACE variants of the register read/write
routines were directly using the raw register access. We need for those
routines to reuse the common code for serializing register access and
ensuring the correct register power states. This is only possible now
that the only routines that required raw access use their own API.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_uncore.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 228bc7a3f37..2dcf682d8da 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -343,7 +343,7 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg) } #define __i915_read(x) \ -u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ +u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool trace) { \ unsigned long irqflags; \ u##x val = 0; \ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \ @@ -359,7 +359,7 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \ val = __raw_i915_read##x(dev_priv, reg); \ } \ spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \ - trace_i915_reg_rw(false, reg, val, sizeof(val)); \ + if (trace) trace_i915_reg_rw(false, reg, val, sizeof(val)); \ return val; \ } @@ -370,10 +370,10 @@ __i915_read(64) #undef __i915_read #define __i915_write(x) \ -void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \ +void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val, bool trace) { \ unsigned long irqflags; \ u32 __fifo_ret = 0; \ - trace_i915_reg_rw(true, reg, val, sizeof(val)); \ + if (trace) trace_i915_reg_rw(true, reg, val, sizeof(val)); \ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \ if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \ __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \ |