diff options
| author | Roy Spliet <r.spliet@student.tudelft.nl> | 2011-11-25 15:52:22 +0100 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2012-03-13 17:06:26 +1000 |
| commit | bfb314652430ceca302bae0981d00903f055eee4 (patch) | |
| tree | 539d40f333d17c6d1789504297d95fe505e192b1 /drivers/gpu/drm/nouveau/nouveau_drv.h | |
| parent | b0103747094b62231fc951dfaca4897f67670874 (diff) | |
drm/nouveau/pm: improve memory timing generation
- Rename several VBIOS entries to closer match the real world
- Add the missing 0x100238 and 0x100240 register values
- Parse bit 14 of the VBIOS timing table
- "Magic value" -> tCWL, fixing some minor bugs in the process
- Also name a few more by their name rather than their number.
- Some values seem to be dependent on the memory type. Fix
Edits by Martin Peres <martin.peres@labri.fr>:
- this is a squash commit
- reworked for fixing some style issues
Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drv.h')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 29 |
1 files changed, 21 insertions, 8 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 78302cccf6f..c5105326db7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -446,6 +446,11 @@ struct nouveau_pm_memtiming { /* To be written to 0x1002c0 */ u8 CL; u8 WR; + u8 tCWL; + + bool odt; + bool dll_disable; + bool ron_pull; }; struct nouveau_pm_tbl_header { @@ -457,18 +462,26 @@ struct nouveau_pm_tbl_header { struct nouveau_pm_tbl_entry { u8 tWR; - u8 tUNK_1; + u8 tWTR; u8 tCL; - u8 tRP; /* Byte 3 */ + u8 tRC; u8 empty_4; - u8 tRAS; /* Byte 5 */ + u8 tRFC; /* Byte 5 */ u8 empty_6; - u8 tRFC; /* Byte 7 */ + u8 tRAS; /* Byte 7 */ u8 empty_8; - u8 tRC; /* Byte 9 */ - u8 tUNK_10, tUNK_11, tUNK_12, tUNK_13, tUNK_14; - u8 empty_15,empty_16,empty_17; - u8 tUNK_18, tUNK_19, tUNK_20, tUNK_21; + u8 tRP; /* Byte 9 */ + u8 tRCDRD; + u8 tRCDWR; + u8 tRRD; + u8 tUNK_13; + u8 RAM_FT1; /* 14, a bitmask of random RAM features */ + u8 empty_15; + u8 tUNK_16; + u8 empty_17; + u8 tUNK_18; + u8 tCWL; + u8 tUNK_20, tUNK_21; }; #define NOUVEAU_PM_MAX_LEVEL 8 |