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authorDave Airlie <airlied@redhat.com>2010-08-10 08:17:50 +1000
committerDave Airlie <airlied@redhat.com>2010-08-10 08:17:50 +1000
commitc3b6ef8633e75bdcde8e845548e3b95e9a21cdf6 (patch)
tree4b97d4d8c955d0c62c2f0dc9dd1627ea07149a86 /drivers/gpu/drm/nouveau/nv30_fb.c
parentd8ab35575098b2d6dc10b2535aeb40545933ae56 (diff)
parent2dc5d2ec0599bd96729f8a9b00d44b56e15d765d (diff)
Merge remote branch 'nouveau/for-airlied' of /ssd/git/drm-nouveau-next into drm-core-next
* 'nouveau/for-airlied' of /ssd/git/drm-nouveau-next: (27 commits) drm/nvc0: fix typo in PRAMIN flush drm/nouveau: Fix DCB TMDS config parsing. drm/nv30: Fix PFB init for nv31. drm/nv04: Fix up SGRAM density detection. drm/i2c/ch7006: Don't use POWER_LEVEL_FULL_POWER_OFF on early chip versions. drm/nouveau: Init dcb->or on cards that have no usable DCB table. drm/nouveau: reduce severity of some "error" messages drm/nvc0: backup bar3 channel on suspend drm/nouveau: implement init table opcodex 0x5e and 0x9a drm/nouveau: implement init table op 0x57, INIT_LTIME drm/nvc0: implement crtc pll setting drm/nvc0: fix evo dma object so we display something drm/nvc0: rudimentary instmem support drm/nvc0: implement memory detection drm/nvc0: allow INIT_GPIO drm/nvc0: starting point for GF100 support, everything stubbed drm/nv30: Workaround dual TMDS brain damage. drm/nouveau: No need to set slave TV encoder configs explicitly. drm/nv17-nv4x: Attempt to init some external TMDS transmitters. drm/nv10: Fix up switching of NV10TCL_DMA_VTXBUF. ...
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv30_fb.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv30_fb.c24
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/gpu/drm/nouveau/nv30_fb.c b/drivers/gpu/drm/nouveau/nv30_fb.c
index 9d35c8b3b83..4a3f2f09512 100644
--- a/drivers/gpu/drm/nouveau/nv30_fb.c
+++ b/drivers/gpu/drm/nouveau/nv30_fb.c
@@ -30,15 +30,25 @@
#include "nouveau_drm.h"
static int
-calc_ref(int b, int l, int i)
+calc_bias(struct drm_device *dev, int k, int i, int j)
+{
+ struct drm_nouveau_private *dev_priv = dev->dev_private;
+ int b = (dev_priv->chipset > 0x30 ?
+ nv_rd32(dev, 0x122c + 0x10 * k + 0x4 * j) >> (4 * (i ^ 1)) :
+ 0) & 0xf;
+
+ return 2 * (b & 0x8 ? b - 0x10 : b);
+}
+
+static int
+calc_ref(struct drm_device *dev, int l, int k, int i)
{
int j, x = 0;
for (j = 0; j < 4; j++) {
- int n = (b >> (8 * j) & 0xf);
- int m = (l >> (8 * i) & 0xff) + 2 * (n & 0x8 ? n - 0x10 : n);
+ int m = (l >> (8 * i) & 0xff) + calc_bias(dev, k, i, j);
- x |= (0x80 | (m & 0x1f)) << (8 * j);
+ x |= (0x80 | clamp(m, 0, 0x1f)) << (8 * j);
}
return x;
@@ -63,18 +73,16 @@ nv30_fb_init(struct drm_device *dev)
dev_priv->chipset == 0x35) {
/* Related to ROP count */
int n = (dev_priv->chipset == 0x31 ? 2 : 4);
- int b = (dev_priv->chipset > 0x30 ?
- nv_rd32(dev, 0x122c) & 0xf : 0);
int l = nv_rd32(dev, 0x1003d0);
for (i = 0; i < n; i++) {
for (j = 0; j < 3; j++)
nv_wr32(dev, 0x10037c + 0xc * i + 0x4 * j,
- calc_ref(b, l, j));
+ calc_ref(dev, l, 0, j));
for (j = 0; j < 2; j++)
nv_wr32(dev, 0x1003ac + 0x8 * i + 0x4 * j,
- calc_ref(b, l, j));
+ calc_ref(dev, l, 1, j));
}
}