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authorDave Airlie <airlied@linux.ie>2009-06-04 07:08:13 +1000
committerDave Airlie <airlied@redhat.com>2009-06-04 09:14:28 +1000
commit9863871bd1bbf218b921af5e0bc48ca4f6ea9f12 (patch)
tree5e6c5a64fd48d4030fe10da7d541ecf93f6f3cf3 /drivers/gpu/drm/radeon/radeon_drv.h
parentb8da7de56ca0ad34726478a50d138a29a9ff76cb (diff)
drm/radeon: fix ring free alignment calculations
fd.o bz#21849 We were aligning to +16 dwords, instead of to the next 16dword boundary in the ring. Fix the calculation to go to the next 16dword boundary when space checking. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 8071d965f14..0c6bfc1de15 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -1964,11 +1964,14 @@ do { \
#define RING_LOCALS int write, _nr, _align_nr; unsigned int mask; u32 *ring;
+#define RADEON_RING_ALIGN 16
+
#define BEGIN_RING( n ) do { \
if ( RADEON_VERBOSE ) { \
DRM_INFO( "BEGIN_RING( %d )\n", (n)); \
} \
- _align_nr = (n + 0xf) & ~0xf; \
+ _align_nr = RADEON_RING_ALIGN - ((dev_priv->ring.tail + n) & (RADEON_RING_ALIGN-1)); \
+ _align_nr += n; \
if (dev_priv->ring.space <= (_align_nr * sizeof(u32))) { \
COMMIT_RING(); \
radeon_wait_ring( dev_priv, _align_nr * sizeof(u32)); \