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authorJoerg Roedel <joerg.roedel@amd.com>2011-12-01 15:49:45 +0100
committerJoerg Roedel <joerg.roedel@amd.com>2011-12-12 14:54:58 +0100
commit5abcdba4fa535c29f736455e37229ee97e0e7f5d (patch)
tree228892cf94773b3215fa588fe8e5fc617afa7591 /drivers/iommu/amd_iommu_types.h
parent400a28a05f2cc1a311acb4ff6ac64d8402d21678 (diff)
iommu/amd: Put IOMMUv2 capable devices in pt_domain
If the device starts to use IOMMUv2 features the dma handles need to stay valid. The only sane way to do this is to use a identity mapping for the device and not translate it by the iommu. This is implemented with this patch. Since this lifts the device-isolation there is also a new kernel parameter which allows to disable that feature. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers/iommu/amd_iommu_types.h')
-rw-r--r--drivers/iommu/amd_iommu_types.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index 7e81094ab73..96c652fae0e 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -330,6 +330,8 @@ struct iommu_dev_data {
struct protection_domain *domain; /* Domain the device is bound to */
atomic_t bind; /* Domain attach reverent count */
u16 devid; /* PCI Device ID */
+ bool iommu_v2; /* Device can make use of IOMMUv2 */
+ bool passthrough; /* Default for device is pt_domain */
struct {
bool enabled;
int qdep;
@@ -575,6 +577,8 @@ extern u32 amd_iommu_max_pasids;
extern bool amd_iommu_v2_present;
+extern bool amd_iommu_force_isolation;
+
/* takes bus and device/function and returns the device id
* FIXME: should that be in generic PCI code? */
static inline u16 calc_devid(u8 bus, u8 devfn)