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authorSeungwon Jeon <tgih.jun@samsung.com>2012-01-02 16:00:02 +0900
committerChris Ball <cjb@laptop.org>2012-01-12 15:17:08 -0500
commit3f514291df96e0a34bc61c7c456ca1d3fdc1f1bb (patch)
tree83a214f47b5de4a155a90ff7ae18e96de988fdb9 /drivers/mmc
parentdd8df17fe83483d7ea06ff229895e35a42071599 (diff)
mmc: dw_mmc: Clear the DDR mode for non-DDR
UHS_REG should be cleared for non-DDR mode. But currently there is no way to clear DDR mode, if it is already set once. This patch adds clearing DDR mode for non-DDR mode. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Acked-by: Will Newton <will.newton@imgtec.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/dw_mmc.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index c583b943f61..94e223825a4 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -707,12 +707,15 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
break;
}
+ regs = mci_readl(slot->host, UHS_REG);
+
/* DDR mode set */
- if (ios->timing == MMC_TIMING_UHS_DDR50) {
- regs = mci_readl(slot->host, UHS_REG);
+ if (ios->timing == MMC_TIMING_UHS_DDR50)
regs |= (0x1 << slot->id) << 16;
- mci_writel(slot->host, UHS_REG, regs);
- }
+ else
+ regs &= ~(0x1 << slot->id) << 16;
+
+ mci_writel(slot->host, UHS_REG, regs);
if (ios->clock) {
/*