aboutsummaryrefslogtreecommitdiff
path: root/drivers/net/phy
diff options
context:
space:
mode:
authorDavid McKay <david.mckay@st.com>2012-02-21 21:24:57 +0000
committerDavid S. Miller <davem@davemloft.net>2012-02-23 17:14:26 -0500
commitb8e3995af4c7da7707b1710332a31f66e06b74dc (patch)
tree486ef40d3989e1abcaabe32666dc0615bd90740e /drivers/net/phy
parent03606895cd98c0a628b17324fd7b5ff15db7e3cd (diff)
netdev/phy/icplus: Correct broken phy_init code
The code for ip1001_config_init() was totally broken if you were not using RGMII. Instead of returning an error code or zero it actually returned the value in the IP1001_SPEC_CTRL_STATUS_2 register. It was also trying to set the IP1001_APS_ON bit , but never actually wrote back the register. The error checking was also incorrect in both this function and the reset function, so this patch fixes that up in a consistent fashion. Signed-off-by: David McKay <david.mckay@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/icplus.c24
1 files changed, 18 insertions, 6 deletions
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index c81f136ae67..7ee4f5822bb 100644
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -98,20 +98,24 @@ static int ip175c_config_init(struct phy_device *phydev)
static int ip1xx_reset(struct phy_device *phydev)
{
- int err, bmcr;
+ int bmcr;
/* Software Reset PHY */
bmcr = phy_read(phydev, MII_BMCR);
+ if (bmcr < 0)
+ return bmcr;
bmcr |= BMCR_RESET;
- err = phy_write(phydev, MII_BMCR, bmcr);
- if (err < 0)
- return err;
+ bmcr = phy_write(phydev, MII_BMCR, bmcr);
+ if (bmcr < 0)
+ return bmcr;
do {
bmcr = phy_read(phydev, MII_BMCR);
+ if (bmcr < 0)
+ return bmcr;
} while (bmcr & BMCR_RESET);
- return err;
+ return 0;
}
static int ip1001_config_init(struct phy_device *phydev)
@@ -124,7 +128,10 @@ static int ip1001_config_init(struct phy_device *phydev)
/* Enable Auto Power Saving mode */
c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2);
+ if (c < 0)
+ return c;
c |= IP1001_APS_ON;
+ c = phy_write(phydev, IP1001_SPEC_CTRL_STATUS_2, c);
if (c < 0)
return c;
@@ -132,11 +139,16 @@ static int ip1001_config_init(struct phy_device *phydev)
/* Additional delay (2ns) used to adjust RX clock phase
* at RGMII interface */
c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
+ if (c < 0)
+ return c;
+
c |= IP1001_PHASE_SEL_MASK;
c = phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
+ if (c < 0)
+ return c;
}
- return c;
+ return 0;
}
static int ip101a_config_init(struct phy_device *phydev)