diff options
| author | Hauke Mehrtens <hauke@hauke-m.de> | 2012-02-01 00:13:56 +0100 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2012-02-06 14:55:36 -0500 |
| commit | d486a5b4996d2fffd10098725781f2c5690774bc (patch) | |
| tree | 4b57776194a09f2164494dfd3cde2121dfd9f791 /drivers/ssb/driver_mipscore.c | |
| parent | bedb2a18af0a4e7565182c07fadd854e3ae8c9bc (diff) | |
ssb: add support for bcm5354
This patch adds support the the BCM5354 SoC.
It has a PMU and a constant not configurable clock.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb/driver_mipscore.c')
| -rw-r--r-- | drivers/ssb/driver_mipscore.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c index ced50156859..7e2ddc042f5 100644 --- a/drivers/ssb/driver_mipscore.c +++ b/drivers/ssb/driver_mipscore.c @@ -208,6 +208,9 @@ u32 ssb_cpu_clock(struct ssb_mipscore *mcore) struct ssb_bus *bus = mcore->dev->bus; u32 pll_type, n, m, rate = 0; + if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU) + return ssb_pmu_get_cpu_clock(&bus->chipco); + if (bus->extif.dev) { ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m); } else if (bus->chipco.dev) { |