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authorGreg Kroah-Hartman <gregkh@suse.de>2010-12-16 10:05:06 -0800
committerGreg Kroah-Hartman <gregkh@suse.de>2010-12-16 10:05:06 -0800
commit36facadd9ea98f8415d0dbb63e0763b7ee9d3911 (patch)
tree99dea00b332ed852f2b0a4923b581dd723f03634 /drivers/usb/otg
parent2faa83e2a519abea1055d156ce1b42b8fa57e87b (diff)
parent0b83ae960cd7d4a5ee02786ecf41ab45688999bf (diff)
Merge branch 'usb-next' into musb-merge
* usb-next: (132 commits) USB: uas: Use GFP_NOIO instead of GFP_KERNEL in I/O submission path USB: uas: Ensure we only bind to a UAS interface USB: uas: Rename sense pipe and sense urb to status pipe and status urb USB: uas: Use kzalloc instead of kmalloc USB: uas: Fix up the Sense IU usb: musb: core: kill unneeded #include's DA8xx: assign name to MUSB IRQ resource usb: gadget: g_ncm added usb: gadget: f_ncm.c added usb: gadget: u_ether: prepare for NCM usb: pch_udc: Fix setup transfers with data out usb: pch_udc: Fix compile error, warnings and checkpatch warnings usb: add ab8500 usb transceiver driver USB: gadget: Implement runtime PM for MSM bus glue driver USB: gadget: Implement runtime PM for ci13xxx gadget USB: gadget: Add USB controller driver for MSM SoC USB: gadget: Introduce ci13xxx_udc_driver struct USB: gadget: Initialize ci13xxx gadget device's coherent DMA mask USB: gadget: Fix "scheduling while atomic" bugs in ci13xxx_udc USB: gadget: Separate out PCI bus code from ci13xxx_udc ...
Diffstat (limited to 'drivers/usb/otg')
-rw-r--r--drivers/usb/otg/Kconfig32
-rw-r--r--drivers/usb/otg/Makefile3
-rw-r--r--drivers/usb/otg/ab8500-usb.c585
-rw-r--r--drivers/usb/otg/msm72k_otg.c1125
-rw-r--r--drivers/usb/otg/twl4030-usb.c3
-rw-r--r--drivers/usb/otg/twl6030-usb.c493
6 files changed, 2240 insertions, 1 deletions
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index 5ce07528cd0..9fb875d5f09 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -59,6 +59,18 @@ config TWL4030_USB
This transceiver supports high and full speed devices plus,
in host mode, low speed.
+config TWL6030_USB
+ tristate "TWL6030 USB Transceiver Driver"
+ depends on TWL4030_CORE
+ select USB_OTG_UTILS
+ help
+ Enable this to support the USB OTG transceiver on TWL6030
+ family chips. This TWL6030 transceiver has the VBUS and ID GND
+ and OTG SRP events capabilities. For all other transceiver functionality
+ UTMI PHY is embedded in OMAP4430. The internal PHY configurations APIs
+ are hooked to this driver through platform_data structure.
+ The definition of internal PHY APIs are in the mach-omap2 layer.
+
config NOP_USB_XCEIV
tristate "NOP USB Transceiver Driver"
select USB_OTG_UTILS
@@ -81,4 +93,24 @@ config USB_LANGWELL_OTG
To compile this driver as a module, choose M here: the
module will be called langwell_otg.
+config USB_MSM_OTG_72K
+ tristate "OTG support for Qualcomm on-chip USB controller"
+ depends on (USB || USB_GADGET) && ARCH_MSM
+ select USB_OTG_UTILS
+ help
+ Enable this to support the USB OTG transceiver on MSM chips. It
+ handles PHY initialization, clock management, and workarounds
+ required after resetting the hardware and power management.
+ This driver is required even for peripheral only or host only
+ mode configurations.
+
+config AB8500_USB
+ tristate "AB8500 USB Transceiver Driver"
+ depends on AB8500_CORE
+ select USB_OTG_UTILS
+ help
+ Enable this to support the USB OTG transceiver in AB8500 chip.
+ This transceiver supports high and full speed devices plus,
+ in host mode, low speed.
+
endif # USB || OTG
diff --git a/drivers/usb/otg/Makefile b/drivers/usb/otg/Makefile
index 66f1b83e4fa..a520e715cfd 100644
--- a/drivers/usb/otg/Makefile
+++ b/drivers/usb/otg/Makefile
@@ -12,6 +12,9 @@ obj-$(CONFIG_USB_OTG_UTILS) += otg.o
obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o
obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
+obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o
obj-$(CONFIG_USB_LANGWELL_OTG) += langwell_otg.o
obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
obj-$(CONFIG_USB_ULPI) += ulpi.o
+obj-$(CONFIG_USB_MSM_OTG_72K) += msm72k_otg.o
+obj-$(CONFIG_AB8500_USB) += ab8500-usb.o
diff --git a/drivers/usb/otg/ab8500-usb.c b/drivers/usb/otg/ab8500-usb.c
new file mode 100644
index 00000000000..d14736b3107
--- /dev/null
+++ b/drivers/usb/otg/ab8500-usb.c
@@ -0,0 +1,585 @@
+/*
+ * drivers/usb/otg/ab8500_usb.c
+ *
+ * USB transceiver driver for AB8500 chip
+ *
+ * Copyright (C) 2010 ST-Ericsson AB
+ * Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/usb/otg.h>
+#include <linux/slab.h>
+#include <linux/notifier.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/mfd/abx500.h>
+#include <linux/mfd/ab8500.h>
+
+#define AB8500_MAIN_WD_CTRL_REG 0x01
+#define AB8500_USB_LINE_STAT_REG 0x80
+#define AB8500_USB_PHY_CTRL_REG 0x8A
+
+#define AB8500_BIT_OTG_STAT_ID (1 << 0)
+#define AB8500_BIT_PHY_CTRL_HOST_EN (1 << 0)
+#define AB8500_BIT_PHY_CTRL_DEVICE_EN (1 << 1)
+#define AB8500_BIT_WD_CTRL_ENABLE (1 << 0)
+#define AB8500_BIT_WD_CTRL_KICK (1 << 1)
+
+#define AB8500_V1x_LINK_STAT_WAIT (HZ/10)
+#define AB8500_WD_KICK_DELAY_US 100 /* usec */
+#define AB8500_WD_V11_DISABLE_DELAY_US 100 /* usec */
+#define AB8500_WD_V10_DISABLE_DELAY_MS 100 /* ms */
+
+/* Usb line status register */
+enum ab8500_usb_link_status {
+ USB_LINK_NOT_CONFIGURED = 0,
+ USB_LINK_STD_HOST_NC,
+ USB_LINK_STD_HOST_C_NS,
+ USB_LINK_STD_HOST_C_S,
+ USB_LINK_HOST_CHG_NM,
+ USB_LINK_HOST_CHG_HS,
+ USB_LINK_HOST_CHG_HS_CHIRP,
+ USB_LINK_DEDICATED_CHG,
+ USB_LINK_ACA_RID_A,
+ USB_LINK_ACA_RID_B,
+ USB_LINK_ACA_RID_C_NM,
+ USB_LINK_ACA_RID_C_HS,
+ USB_LINK_ACA_RID_C_HS_CHIRP,
+ USB_LINK_HM_IDGND,
+ USB_LINK_RESERVED,
+ USB_LINK_NOT_VALID_LINK
+};
+
+struct ab8500_usb {
+ struct otg_transceiver otg;
+ struct device *dev;
+ int irq_num_id_rise;
+ int irq_num_id_fall;
+ int irq_num_vbus_rise;
+ int irq_num_vbus_fall;
+ int irq_num_link_status;
+ unsigned vbus_draw;
+ struct delayed_work dwork;
+ struct work_struct phy_dis_work;
+ unsigned long link_status_wait;
+ int rev;
+};
+
+static inline struct ab8500_usb *xceiv_to_ab(struct otg_transceiver *x)
+{
+ return container_of(x, struct ab8500_usb, otg);
+}
+
+static void ab8500_usb_wd_workaround(struct ab8500_usb *ab)
+{
+ abx500_set_register_interruptible(ab->dev,
+ AB8500_SYS_CTRL2_BLOCK,
+ AB8500_MAIN_WD_CTRL_REG,
+ AB8500_BIT_WD_CTRL_ENABLE);
+
+ udelay(AB8500_WD_KICK_DELAY_US);
+
+ abx500_set_register_interruptible(ab->dev,
+ AB8500_SYS_CTRL2_BLOCK,
+ AB8500_MAIN_WD_CTRL_REG,
+ (AB8500_BIT_WD_CTRL_ENABLE
+ | AB8500_BIT_WD_CTRL_KICK));
+
+ if (ab->rev > 0x10) /* v1.1 v2.0 */
+ udelay(AB8500_WD_V11_DISABLE_DELAY_US);
+ else /* v1.0 */
+ msleep(AB8500_WD_V10_DISABLE_DELAY_MS);
+
+ abx500_set_register_interruptible(ab->dev,
+ AB8500_SYS_CTRL2_BLOCK,
+ AB8500_MAIN_WD_CTRL_REG,
+ 0);
+}
+
+static void ab8500_usb_phy_ctrl(struct ab8500_usb *ab, bool sel_host,
+ bool enable)
+{
+ u8 ctrl_reg;
+ abx500_get_register_interruptible(ab->dev,
+ AB8500_USB,
+ AB8500_USB_PHY_CTRL_REG,
+ &ctrl_reg);
+ if (sel_host) {
+ if (enable)
+ ctrl_reg |= AB8500_BIT_PHY_CTRL_HOST_EN;
+ else
+ ctrl_reg &= ~AB8500_BIT_PHY_CTRL_HOST_EN;
+ } else {
+ if (enable)
+ ctrl_reg |= AB8500_BIT_PHY_CTRL_DEVICE_EN;
+ else
+ ctrl_reg &= ~AB8500_BIT_PHY_CTRL_DEVICE_EN;
+ }
+
+ abx500_set_register_interruptible(ab->dev,
+ AB8500_USB,
+ AB8500_USB_PHY_CTRL_REG,
+ ctrl_reg);
+
+ /* Needed to enable the phy.*/
+ if (enable)
+ ab8500_usb_wd_workaround(ab);
+}
+
+#define ab8500_usb_host_phy_en(ab) ab8500_usb_phy_ctrl(ab, true, true)
+#define ab8500_usb_host_phy_dis(ab) ab8500_usb_phy_ctrl(ab, true, false)
+#define ab8500_usb_peri_phy_en(ab) ab8500_usb_phy_ctrl(ab, false, true)
+#define ab8500_usb_peri_phy_dis(ab) ab8500_usb_phy_ctrl(ab, false, false)
+
+static int ab8500_usb_link_status_update(struct ab8500_usb *ab)
+{
+ u8 reg;
+ enum ab8500_usb_link_status lsts;
+ void *v = NULL;
+ enum usb_xceiv_events event;
+
+ abx500_get_register_interruptible(ab->dev,
+ AB8500_USB,
+ AB8500_USB_LINE_STAT_REG,
+ &reg);
+
+ lsts = (reg >> 3) & 0x0F;
+
+ switch (lsts) {
+ case USB_LINK_NOT_CONFIGURED:
+ case USB_LINK_RESERVED:
+ case USB_LINK_NOT_VALID_LINK:
+ /* TODO: Disable regulators. */
+ ab8500_usb_host_phy_dis(ab);
+ ab8500_usb_peri_phy_dis(ab);
+ ab->otg.state = OTG_STATE_B_IDLE;
+ ab->otg.default_a = false;
+ ab->vbus_draw = 0;
+ event = USB_EVENT_NONE;
+ break;
+
+ case USB_LINK_STD_HOST_NC:
+ case USB_LINK_STD_HOST_C_NS:
+ case USB_LINK_STD_HOST_C_S:
+ case USB_LINK_HOST_CHG_NM:
+ case USB_LINK_HOST_CHG_HS:
+ case USB_LINK_HOST_CHG_HS_CHIRP:
+ if (ab->otg.gadget) {
+ /* TODO: Enable regulators. */
+ ab8500_usb_peri_phy_en(ab);
+ v = ab->otg.gadget;
+ }
+ event = USB_EVENT_VBUS;
+ break;
+
+ case USB_LINK_HM_IDGND:
+ if (ab->otg.host) {
+ /* TODO: Enable regulators. */
+ ab8500_usb_host_phy_en(ab);
+ v = ab->otg.host;
+ }
+ ab->otg.state = OTG_STATE_A_IDLE;
+ ab->otg.default_a = true;
+ event = USB_EVENT_ID;
+ break;
+
+ case USB_LINK_ACA_RID_A:
+ case USB_LINK_ACA_RID_B:
+ /* TODO */
+ case USB_LINK_ACA_RID_C_NM:
+ case USB_LINK_ACA_RID_C_HS:
+ case USB_LINK_ACA_RID_C_HS_CHIRP:
+ case USB_LINK_DEDICATED_CHG:
+ /* TODO: vbus_draw */
+ event = USB_EVENT_CHARGER;
+ break;
+ }
+
+ blocking_notifier_call_chain(&ab->otg.notifier, event, v);
+
+ return 0;
+}
+
+static void ab8500_usb_delayed_work(struct work_struct *work)
+{
+ struct ab8500_usb *ab = container_of(work, struct ab8500_usb,
+ dwork.work);
+
+ ab8500_usb_link_status_update(ab);
+}
+
+static irqreturn_t ab8500_usb_v1x_common_irq(int irq, void *data)
+{
+ struct ab8500_usb *ab = (struct ab8500_usb *) data;
+
+ /* Wait for link status to become stable. */
+ schedule_delayed_work(&ab->dwork, ab->link_status_wait);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t ab8500_usb_v1x_vbus_fall_irq(int irq, void *data)
+{
+ struct ab8500_usb *ab = (struct ab8500_usb *) data;
+
+ /* Link status will not be updated till phy is disabled. */
+ ab8500_usb_peri_phy_dis(ab);
+
+ /* Wait for link status to become stable. */
+ schedule_delayed_work(&ab->dwork, ab->link_status_wait);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t ab8500_usb_v20_irq(int irq, void *data)
+{
+ struct ab8500_usb *ab = (struct ab8500_usb *) data;
+
+ ab8500_usb_link_status_update(ab);
+
+ return IRQ_HANDLED;
+}
+
+static void ab8500_usb_phy_disable_work(struct work_struct *work)
+{
+ struct ab8500_usb *ab = container_of(work, struct ab8500_usb,
+ phy_dis_work);
+
+ if (!ab->otg.host)
+ ab8500_usb_host_phy_dis(ab);
+
+ if (!ab->otg.gadget)
+ ab8500_usb_peri_phy_dis(ab);
+}
+
+static int ab8500_usb_set_power(struct otg_transceiver *otg, unsigned mA)
+{
+ struct ab8500_usb *ab;
+
+ if (!otg)
+ return -ENODEV;
+
+ ab = xceiv_to_ab(otg);
+
+ ab->vbus_draw = mA;
+
+ if (mA)
+ blocking_notifier_call_chain(&ab->otg.notifier,
+ USB_EVENT_ENUMERATED, ab->otg.gadget);
+ return 0;
+}
+
+/* TODO: Implement some way for charging or other drivers to read
+ * ab->vbus_draw.
+ */
+
+static int ab8500_usb_set_suspend(struct otg_transceiver *x, int suspend)
+{
+ /* TODO */
+ return 0;
+}
+
+static int ab8500_usb_set_peripheral(struct otg_transceiver *otg,
+ struct usb_gadget *gadget)
+{
+ struct ab8500_usb *ab;
+
+ if (!otg)
+ return -ENODEV;
+
+ ab = xceiv_to_ab(otg);
+
+ /* Some drivers call this function in atomic context.
+ * Do not update ab8500 registers directly till this
+ * is fixed.
+ */
+
+ if (!gadget) {
+ /* TODO: Disable regulators. */
+ ab->otg.gadget = NULL;
+ schedule_work(&ab->phy_dis_work);
+ } else {
+ ab->otg.gadget = gadget;
+ ab->otg.state = OTG_STATE_B_IDLE;
+
+ /* Phy will not be enabled if cable is already
+ * plugged-in. Schedule to enable phy.
+ * Use same delay to avoid any race condition.
+ */
+ schedule_delayed_work(&ab->dwork, ab->link_status_wait);
+ }
+
+ return 0;
+}
+
+static int ab8500_usb_set_host(struct otg_transceiver *otg,
+ struct usb_bus *host)
+{
+ struct ab8500_usb *ab;
+
+ if (!otg)
+ return -ENODEV;
+
+ ab = xceiv_to_ab(otg);
+
+ /* Some drivers call this function in atomic context.
+ * Do not update ab8500 registers directly till this
+ * is fixed.
+ */
+
+ if (!host) {
+ /* TODO: Disable regulators. */
+ ab->otg.host = NULL;
+ schedule_work(&ab->phy_dis_work);
+ } else {
+ ab->otg.host = host;
+ /* Phy will not be enabled if cable is already
+ * plugged-in. Schedule to enable phy.
+ * Use same delay to avoid any race condition.
+ */
+ schedule_delayed_work(&ab->dwork, ab->link_status_wait);
+ }
+
+ return 0;
+}
+
+static void ab8500_usb_irq_free(struct ab8500_usb *ab)
+{
+ if (ab->rev < 0x20) {
+ free_irq(ab->irq_num_id_rise, ab);
+ free_irq(ab->irq_num_id_fall, ab);
+ free_irq(ab->irq_num_vbus_rise, ab);
+ free_irq(ab->irq_num_vbus_fall, ab);
+ } else {
+ free_irq(ab->irq_num_link_status, ab);
+ }
+}
+
+static int ab8500_usb_v1x_res_setup(struct platform_device *pdev,
+ struct ab8500_usb *ab)
+{
+ int err;
+
+ ab->irq_num_id_rise = platform_get_irq_byname(pdev, "ID_WAKEUP_R");
+ if (ab->irq_num_id_rise < 0) {
+ dev_err(&pdev->dev, "ID rise irq not found\n");
+ return ab->irq_num_id_rise;
+ }
+ err = request_threaded_irq(ab->irq_num_id_rise, NULL,
+ ab8500_usb_v1x_common_irq,
+ IRQF_NO_SUSPEND | IRQF_SHARED,
+ "usb-id-rise", ab);
+ if (err < 0) {
+ dev_err(ab->dev, "request_irq failed for ID rise irq\n");
+ goto fail0;
+ }
+
+ ab->irq_num_id_fall = platform_get_irq_byname(pdev, "ID_WAKEUP_F");
+ if (ab->irq_num_id_fall < 0) {
+ dev_err(&pdev->dev, "ID fall irq not found\n");
+ return ab->irq_num_id_fall;
+ }
+ err = request_threaded_irq(ab->irq_num_id_fall, NULL,
+ ab8500_usb_v1x_common_irq,
+ IRQF_NO_SUSPEND | IRQF_SHARED,
+ "usb-id-fall", ab);
+ if (err < 0) {
+ dev_err(ab->dev, "request_irq failed for ID fall irq\n");
+ goto fail1;
+ }
+
+ ab->irq_num_vbus_rise = platform_get_irq_byname(pdev, "VBUS_DET_R");
+ if (ab->irq_num_vbus_rise < 0) {
+ dev_err(&pdev->dev, "VBUS rise irq not found\n");
+ return ab->irq_num_vbus_rise;
+ }
+ err = request_threaded_irq(ab->irq_num_vbus_rise, NULL,
+ ab8500_usb_v1x_common_irq,
+ IRQF_NO_SUSPEND | IRQF_SHARED,
+ "usb-vbus-rise", ab);
+ if (err < 0) {
+ dev_err(ab->dev, "request_irq failed for Vbus rise irq\n");
+ goto fail2;
+ }
+
+ ab->irq_num_vbus_fall = platform_get_irq_byname(pdev, "VBUS_DET_F");
+ if (ab->irq_num_vbus_fall < 0) {
+ dev_err(&pdev->dev, "VBUS fall irq not found\n");
+ return ab->irq_num_vbus_fall;
+ }
+ err = request_threaded_irq(ab->irq_num_vbus_fall, NULL,
+ ab8500_usb_v1x_vbus_fall_irq,
+ IRQF_NO_SUSPEND | IRQF_SHARED,
+ "usb-vbus-fall", ab);
+ if (err < 0) {
+ dev_err(ab->dev, "request_irq failed for Vbus fall irq\n");
+ goto fail3;
+ }
+
+ return 0;
+fail3:
+ free_irq(ab->irq_num_vbus_rise, ab);
+fail2:
+ free_irq(ab->irq_num_id_fall, ab);
+fail1:
+ free_irq(ab->irq_num_id_rise, ab);
+fail0:
+ return err;
+}
+
+static int ab8500_usb_v2_res_setup(struct platform_device *pdev,
+ struct ab8500_usb *ab)
+{
+ int err;
+
+ ab->irq_num_link_status = platform_get_irq_byname(pdev,
+ "USB_LINK_STATUS");
+ if (ab->irq_num_link_status < 0) {
+ dev_err(&pdev->dev, "Link status irq not found\n");
+ return ab->irq_num_link_status;
+ }
+
+ err = request_threaded_irq(ab->irq_num_link_status, NULL,
+ ab8500_usb_v20_irq,
+ IRQF_NO_SUSPEND | IRQF_SHARED,
+ "usb-link-status", ab);
+ if (err < 0) {
+ dev_err(ab->dev,
+ "request_irq failed for link status irq\n");
+ return err;
+ }
+
+ return 0;
+}
+
+static int __devinit ab8500_usb_probe(struct platform_device *pdev)
+{
+ struct ab8500_usb *ab;
+ int err;
+ int rev;
+
+ rev = abx500_get_chip_id(&pdev->dev);
+ if (rev < 0) {
+ dev_err(&pdev->dev, "Chip id read failed\n");
+ return rev;
+ } else if (rev < 0x10) {
+ dev_err(&pdev->dev, "Unsupported AB8500 chip\n");
+ return -ENODEV;
+ }
+
+ ab = kzalloc(sizeof *ab, GFP_KERNEL);
+ if (!ab)
+ return -ENOMEM;
+
+ ab->dev = &pdev->dev;
+ ab->rev = rev;
+ ab->otg.dev = ab->dev;
+ ab->otg.label = "ab8500";
+ ab->otg.state = OTG_STATE_UNDEFINED;
+ ab->otg.set_host = ab8500_usb_set_host;
+ ab->otg.set_peripheral = ab8500_usb_set_peripheral;
+ ab->otg.set_suspend = ab8500_usb_set_suspend;
+ ab->otg.set_power = ab8500_usb_set_power;
+
+ platform_set_drvdata(pdev, ab);
+
+ BLOCKING_INIT_NOTIFIER_HEAD(&ab->otg.notifier);
+
+ /* v1: Wait for link status to become stable.
+ * all: Updates form set_host and set_peripheral as they are atomic.
+ */
+ INIT_DELAYED_WORK(&ab->dwork, ab8500_usb_delayed_work);
+
+ /* all: Disable phy when called from set_host and set_peripheral */
+ INIT_WORK(&ab->phy_dis_work, ab8500_usb_phy_disable_work);
+
+ if (ab->rev < 0x20) {
+ err = ab8500_usb_v1x_res_setup(pdev, ab);
+ ab->link_status_wait = AB8500_V1x_LINK_STAT_WAIT;
+ } else {
+ err = ab8500_usb_v2_res_setup(pdev, ab);
+ }
+
+ if (err < 0)
+ goto fail0;
+
+ err = otg_set_transceiver(&ab->otg);
+ if (err) {
+ dev_err(&pdev->dev, "Can't register transceiver\n");
+ goto fail1;
+ }
+
+ dev_info(&pdev->dev, "AB8500 usb driver initialized\n");
+
+ return 0;
+fail1:
+ ab8500_usb_irq_free(ab);
+fail0:
+ kfree(ab);
+ return err;
+}
+
+static int __devexit ab8500_usb_remove(struct platform_device *pdev)
+{
+ struct ab8500_usb *ab = platform_get_drvdata(pdev);
+
+ ab8500_usb_irq_free(ab);
+
+ cancel_delayed_work_sync(&ab->dwork);
+
+ cancel_work_sync(&ab->phy_dis_work);
+
+ otg_set_transceiver(NULL);
+
+ ab8500_usb_host_phy_dis(ab);
+ ab8500_usb_peri_phy_dis(ab);
+
+ platform_set_drvdata(pdev, NULL);
+
+ kfree(ab);
+
+ return 0;
+}
+
+static struct platform_driver ab8500_usb_driver = {
+ .probe = ab8500_usb_probe,
+ .remove = __devexit_p(ab8500_usb_remove),
+ .driver = {
+ .name = "ab8500-usb",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init ab8500_usb_init(void)
+{
+ return platform_driver_register(&ab8500_usb_driver);
+}
+subsys_initcall(ab8500_usb_init);
+
+static void __exit ab8500_usb_exit(void)
+{
+ platform_driver_unregister(&ab8500_usb_driver);
+}
+module_exit(ab8500_usb_exit);
+
+MODULE_ALIAS("platform:ab8500_usb");
+MODULE_AUTHOR("ST-Ericsson AB");
+MODULE_DESCRIPTION("AB8500 usb transceiver driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/usb/otg/msm72k_otg.c b/drivers/usb/otg/msm72k_otg.c
new file mode 100644
index 00000000000..1cd52edcd0c
--- /dev/null
+++ b/drivers/usb/otg/msm72k_otg.c
@@ -0,0 +1,1125 @@
+/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/uaccess.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include <linux/pm_runtime.h>
+
+#include <linux/usb.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/ulpi.h>
+#include <linux/usb/gadget.h>
+#include <linux/usb/hcd.h>
+#include <linux/usb/msm_hsusb.h>
+#include <linux/usb/msm_hsusb_hw.h>
+
+#include <mach/clk.h>
+
+#define MSM_USB_BASE (motg->regs)
+#define DRIVER_NAME "msm_otg"
+
+#define ULPI_IO_TIMEOUT_USEC (10 * 1000)
+static int ulpi_read(struct otg_transceiver *otg, u32 reg)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+ int cnt = 0;
+
+ /* initiate read operation */
+ writel(ULPI_RUN | ULPI_READ | ULPI_ADDR(reg),
+ USB_ULPI_VIEWPORT);
+
+ /* wait for completion */
+ while (cnt < ULPI_IO_TIMEOUT_USEC) {
+ if (!(readl(USB_ULPI_VIEWPORT) & ULPI_RUN))
+ break;
+ udelay(1);
+ cnt++;
+ }
+
+ if (cnt >= ULPI_IO_TIMEOUT_USEC) {
+ dev_err(otg->dev, "ulpi_read: timeout %08x\n",
+ readl(USB_ULPI_VIEWPORT));
+ return -ETIMEDOUT;
+ }
+ return ULPI_DATA_READ(readl(USB_ULPI_VIEWPORT));
+}
+
+static int ulpi_write(struct otg_transceiver *otg, u32 val, u32 reg)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+ int cnt = 0;
+
+ /* initiate write operation */
+ writel(ULPI_RUN | ULPI_WRITE |
+ ULPI_ADDR(reg) | ULPI_DATA(val),
+ USB_ULPI_VIEWPORT);
+
+ /* wait for completion */
+ while (cnt < ULPI_IO_TIMEOUT_USEC) {
+ if (!(readl(USB_ULPI_VIEWPORT) & ULPI_RUN))
+ break;
+ udelay(1);
+ cnt++;
+ }
+
+ if (cnt >= ULPI_IO_TIMEOUT_USEC) {
+ dev_err(otg->dev, "ulpi_write: timeout\n");
+ return -ETIMEDOUT;
+ }
+ return 0;
+}
+
+static struct otg_io_access_ops msm_otg_io_ops = {
+ .read = ulpi_read,
+ .write = ulpi_write,
+};
+
+static void ulpi_init(struct msm_otg *motg)
+{
+ struct msm_otg_platform_data *pdata = motg->pdata;
+ int *seq = pdata->phy_init_seq;
+
+ if (!seq)
+ return;
+
+ while (seq[0] >= 0) {
+ dev_vdbg(motg->otg.dev, "ulpi: write 0x%02x to 0x%02x\n",
+ seq[0], seq[1]);
+ ulpi_write(&motg->otg, seq[0], seq[1]);
+ seq += 2;
+ }
+}
+
+static int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert)
+{
+ int ret;
+
+ if (assert) {
+ ret = clk_reset(motg->clk, CLK_RESET_ASSERT);
+ if (ret)
+ dev_err(motg->otg.dev, "usb hs_clk assert failed\n");
+ } else {
+ ret = clk_reset(motg->clk, CLK_RESET_DEASSERT);
+ if (ret)
+ dev_err(motg->otg.dev, "usb hs_clk deassert failed\n");
+ }
+ return ret;
+}
+
+static int msm_otg_phy_clk_reset(struct msm_otg *motg)
+{
+ int ret;
+
+ ret = clk_reset(motg->phy_reset_clk, CLK_RESET_ASSERT);
+ if (ret) {
+ dev_err(motg->otg.dev, "usb phy clk assert failed\n");
+ return ret;
+ }
+ usleep_range(10000, 12000);
+ ret = clk_reset(motg->phy_reset_clk, CLK_RESET_DEASSERT);
+ if (ret)
+ dev_err(motg->otg.dev, "usb phy clk deassert failed\n");
+ return ret;
+}
+
+static int msm_otg_phy_reset(struct msm_otg *motg)
+{
+ u32 val;
+ int ret;
+ int retries;
+
+ ret = msm_otg_link_clk_reset(motg, 1);
+ if (ret)
+ return ret;
+ ret = msm_otg_phy_clk_reset(motg);
+ if (ret)
+ return ret;
+ ret = msm_otg_link_clk_reset(motg, 0);
+ if (ret)
+ return ret;
+
+ val = readl(USB_PORTSC) & ~PORTSC_PTS_MASK;
+ writel(val | PORTSC_PTS_ULPI, USB_PORTSC);
+
+ for (retries = 3; retries > 0; retries--) {
+ ret = ulpi_write(&motg->otg, ULPI_FUNC_CTRL_SUSPENDM,
+ ULPI_CLR(ULPI_FUNC_CTRL));
+ if (!ret)
+ break;
+ ret = msm_otg_phy_clk_reset(motg);
+ if (ret)
+ return ret;
+ }
+ if (!retries)
+ return -ETIMEDOUT;
+
+ /* This reset calibrates the phy, if the above write succeeded */
+ ret = msm_otg_phy_clk_reset(motg);
+ if (ret)
+ return ret;
+
+ for (retries = 3; retries > 0; retries--) {
+ ret = ulpi_read(&motg->otg, ULPI_DEBUG);
+ if (ret != -ETIMEDOUT)
+ break;
+ ret = msm_otg_phy_clk_reset(motg);
+ if (ret)
+ return ret;
+ }
+ if (!retries)
+ return -ETIMEDOUT;
+
+ dev_info(motg->otg.dev, "phy_reset: success\n");
+ return 0;
+}
+
+#define LINK_RESET_TIMEOUT_USEC (250 * 1000)
+static int msm_otg_reset(struct otg_transceiver *otg)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+ struct msm_otg_platform_data *pdata = motg->pdata;
+ int cnt = 0;
+ int ret;
+ u32 val = 0;
+ u32 ulpi_val = 0;
+
+ ret = msm_otg_phy_reset(motg);
+ if (ret) {
+ dev_err(otg->dev, "phy_reset failed\n");
+ return ret;
+ }
+
+ ulpi_init(motg);
+
+ writel(USBCMD_RESET, USB_USBCMD);
+ while (cnt < LINK_RESET_TIMEOUT_USEC) {
+ if (!(readl(USB_USBCMD) & USBCMD_RESET))
+ break;
+ udelay(1);
+ cnt++;
+ }
+ if (cnt >= LINK_RESET_TIMEOUT_USEC)
+ return -ETIMEDOUT;
+
+ /* select ULPI phy */
+ writel(0x80000000, USB_PORTSC);
+
+ msleep(100);
+
+ writel(0x0, USB_AHBBURST);
+ writel(0x00, USB_AHBMODE);
+
+ if (pdata->otg_control == OTG_PHY_CONTROL) {
+ val = readl(USB_OTGSC);
+ if (pdata->mode == USB_OTG) {
+ ulpi_val = ULPI_INT_IDGRD | ULPI_INT_SESS_VALID;
+ val |= OTGSC_IDIE | OTGSC_BSVIE;
+ } else if (pdata->mode == USB_PERIPHERAL) {
+ ulpi_val = ULPI_INT_SESS_VALID;
+ val |= OTGSC_BSVIE;
+ }
+ writel(val, USB_OTGSC);
+ ulpi_write(otg, ulpi_val, ULPI_USB_INT_EN_RISE);
+ ulpi_write(otg, ulpi_val, ULPI_USB_INT_EN_FALL);
+ }
+
+ return 0;
+}
+
+#define PHY_SUSPEND_TIMEOUT_USEC (500 * 1000)
+static int msm_otg_suspend(struct msm_otg *motg)
+{
+ struct otg_transceiver *otg = &motg->otg;
+ struct usb_bus *bus = otg->host;
+ struct msm_otg_platform_data *pdata = motg->pdata;
+ int cnt = 0;
+
+ if (atomic_read(&motg->in_lpm))
+ return 0;
+
+ disable_irq(motg->irq);
+ /*
+ * Interrupt Latch Register auto-clear feature is not present
+ * in all PHY versions. Latch register is clear on read type.
+ * Clear latch register to avoid spurious wakeup from
+ * low power mode (LPM).
+ */
+ ulpi_read(otg, 0x14);
+
+ /*
+ * PHY comparators are disabled when PHY enters into low power
+ * mode (LPM). Keep PHY comparators ON in LPM only when we expect
+ * VBUS/Id notifications from USB PHY. Otherwise turn off USB
+ * PHY comparators. This save significant amount of power.
+ */
+ if (pdata->otg_control == OTG_PHY_CONTROL)
+ ulpi_write(otg, 0x01, 0x30);
+
+ /*
+ * PLL is not turned off when PHY enters into low power mode (LPM).
+ * Disable PLL for maximum power savings.
+ */
+ ulpi_write(otg, 0x08, 0x09);
+
+ /*
+ * PHY may take some time or even fail to enter into low power
+ * mode (LPM). Hence poll for 500 msec and reset the PHY and link
+ * in failure case.
+ */
+ writel(readl(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC);
+ while (cnt < PHY_SUSPEND_TIMEOUT_USEC) {
+ if (readl(USB_PORTSC) & PORTSC_PHCD)
+ break;
+ udelay(1);
+ cnt++;
+ }
+
+ if (cnt >= PHY_SUSPEND_TIMEOUT_USEC) {
+ dev_err(otg->dev, "Unable to suspend PHY\n");
+ msm_otg_reset(otg);
+ enable_irq(motg->irq);
+ return -ETIMEDOUT;
+ }
+
+ /*
+ * PHY has capability to generate interrupt asynchronously in low
+ * power mode (LPM). This interrupt is level triggered. So USB IRQ
+ * line must be disabled till async interrupt enable bit is cleared
+ * in USBCMD register. Assert STP (ULPI interface STOP signal) to
+ * block data communication from PHY.
+ */
+ writel(readl(USB_USBCMD) | ASYNC_INTR_CTRL | ULPI_STP_CTRL, USB_USBCMD);
+
+ clk_disable(motg->pclk);
+ clk_disable(motg->clk);
+ if (motg->core_clk)
+ clk_disable(motg->core_clk);
+
+ if (device_may_wakeup(otg->dev))
+ enable_irq_wake(motg->irq);
+ if (bus)
+ clear_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
+
+ atomic_set(&motg->in_lpm, 1);
+ enable_irq(motg->irq);
+
+ dev_info(otg->dev, "USB in low power mode\n");
+
+ return 0;
+}
+
+#define PHY_RESUME_TIMEOUT_USEC (100 * 1000)
+static int msm_otg_resume(struct msm_otg *motg)
+{
+ struct otg_transceiver *otg = &motg->otg;
+ struct usb_bus *bus = otg->host;
+ int cnt = 0;
+ unsigned temp;
+
+ if (!atomic_read(&motg->in_lpm))
+ return 0;
+
+ clk_enable(motg->pclk);
+ clk_enable(motg->clk);
+ if (motg->core_clk)
+ clk_enable(motg->core_clk);
+
+ temp = readl(USB_USBCMD);
+ temp &= ~ASYNC_INTR_CTRL;
+ temp &= ~ULPI_STP_CTRL;
+ writel(temp, USB_USBCMD);
+
+ /*
+ * PHY comes out of low power mode (LPM) in case of wakeup
+ * from asynchronous interrupt.
+ */
+ if (!(readl(USB_PORTSC) & PORTSC_PHCD))
+ goto skip_phy_resume;
+
+ writel(readl(USB_PORTSC) & ~PORTSC_PHCD, USB_PORTSC);
+ while (cnt < PHY_RESUME_TIMEOUT_USEC) {
+ if (!(readl(USB_PORTSC) & PORTSC_PHCD))
+ break;
+ udelay(1);
+ cnt++;
+ }
+
+ if (cnt >= PHY_RESUME_TIMEOUT_USEC) {
+ /*
+ * This is a fatal error. Reset the link and
+ * PHY. USB state can not be restored. Re-insertion
+ * of USB cable is the only way to get USB working.
+ */
+ dev_err(otg->dev, "Unable to resume USB."
+ "Re-plugin the cable\n");
+ msm_otg_reset(otg);
+ }
+
+skip_phy_resume:
+ if (device_may_wakeup(otg->dev))
+ disable_irq_wake(motg->irq);
+ if (bus)
+ set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
+
+ if (motg->async_int) {
+ motg->async_int = 0;
+ pm_runtime_put(otg->dev);
+ enable_irq(motg->irq);
+ }
+
+ atomic_set(&motg->in_lpm, 0);
+
+ dev_info(otg->dev, "USB exited from low power mode\n");
+
+ return 0;
+}
+
+static void msm_otg_start_host(struct otg_transceiver *otg, int on)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+ struct msm_otg_platform_data *pdata = motg->pdata;
+ struct usb_hcd *hcd;
+
+ if (!otg->host)
+ return;
+
+ hcd = bus_to_hcd(otg->host);
+
+ if (on) {
+ dev_dbg(otg->dev, "host on\n");
+
+ if (pdata->vbus_power)
+ pdata->vbus_power(1);
+ /*
+ * Some boards have a switch cotrolled by gpio
+ * to enable/disable internal HUB. Enable internal
+ * HUB before kicking the host.
+ */
+ if (pdata->setup_gpio)
+ pdata->setup_gpio(OTG_STATE_A_HOST);
+#ifdef CONFIG_USB
+ usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
+#endif
+ } else {
+ dev_dbg(otg->dev, "host off\n");
+
+#ifdef CONFIG_USB
+ usb_remove_hcd(hcd);
+#endif
+ if (pdata->setup_gpio)
+ pdata->setup_gpio(OTG_STATE_UNDEFINED);
+ if (pdata->vbus_power)
+ pdata->vbus_power(0);
+ }
+}
+
+static int msm_otg_set_host(struct otg_transceiver *otg, struct usb_bus *host)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+ struct usb_hcd *hcd;
+
+ /*
+ * Fail host registration if this board can support
+ * only peripheral configuration.
+ */
+ if (motg->pdata->mode == USB_PERIPHERAL) {
+ dev_info(otg->dev, "Host mode is not supported\n");
+ return -ENODEV;
+ }
+
+ if (!host) {
+ if (otg->state == OTG_STATE_A_HOST) {
+ pm_runtime_get_sync(otg->dev);
+ msm_otg_start_host(otg, 0);
+ otg->host = NULL;
+ otg->state = OTG_STATE_UNDEFINED;
+ schedule_work(&motg->sm_work);
+ } else {
+ otg->host = NULL;
+ }
+
+ return 0;
+ }
+
+ hcd = bus_to_hcd(host);
+ hcd->power_budget = motg->pdata->power_budget;
+
+ otg->host = host;
+ dev_dbg(otg->dev, "host driver registered w/ tranceiver\n");
+
+ /*
+ * Kick the state machine work, if peripheral is not supported
+ * or peripheral is already registered with us.
+ */
+ if (motg->pdata->mode == USB_HOST || otg->gadget) {
+ pm_runtime_get_sync(otg->dev);
+ schedule_work(&motg->sm_work);
+ }
+
+ return 0;
+}
+
+static void msm_otg_start_peripheral(struct otg_transceiver *otg, int on)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+ struct msm_otg_platform_data *pdata = motg->pdata;
+
+ if (!otg->gadget)
+ return;
+
+ if (on) {
+ dev_dbg(otg->dev, "gadget on\n");
+ /*
+ * Some boards have a switch cotrolled by gpio
+ * to enable/disable internal HUB. Disable internal
+ * HUB before kicking the gadget.
+ */
+ if (pdata->setup_gpio)
+ pdata->setup_gpio(OTG_STATE_B_PERIPHERAL);
+ usb_gadget_vbus_connect(otg->gadget);
+ } else {
+ dev_dbg(otg->dev, "gadget off\n");
+ usb_gadget_vbus_disconnect(otg->gadget);
+ if (pdata->setup_gpio)
+ pdata->setup_gpio(OTG_STATE_UNDEFINED);
+ }
+
+}
+
+static int msm_otg_set_peripheral(struct otg_transceiver *otg,
+ struct usb_gadget *gadget)
+{
+ struct msm_otg *motg = container_of(otg, struct msm_otg, otg);
+
+ /*
+ * Fail peripheral registration if this board can support
+ * only host configuration.
+ */
+ if (motg->pdata->mode == USB_HOST) {
+ dev_info(otg->dev, "Peripheral mode is not supported\n");
+ return -ENODEV;
+ }
+
+ if (!gadget) {
+ if (otg->state == OTG_STATE_B_PERIPHERAL) {
+ pm_runtime_get_sync(otg->dev);
+ msm_otg_start_peripheral(otg, 0);
+ otg->gadget = NULL;
+ otg->state = OTG_STATE_UNDEFINED;
+ schedule_work(&motg->sm_work);
+ } else {
+ otg->gadget = NULL;
+ }
+
+ return 0;
+ }
+ otg->gadget = gadget;
+ dev_dbg(otg->dev, "peripheral driver registered w/ tranceiver\n");
+
+ /*
+ * Kick the state machine work, if host is not supported
+ * or host is already registered with us.
+ */
+ if (motg->pdata->mode == USB_PERIPHERAL || otg->host) {
+ pm_runtime_get_sync(otg->dev);
+ schedule_work(&motg->sm_work);
+ }
+
+ return 0;
+}
+
+/*
+ * We support OTG, Peripheral only and Host only configurations. In case
+ * of OTG, mode switch (host-->peripheral/peripheral-->host) can happen
+ * via Id pin status or user request (debugfs). Id/BSV interrupts are not
+ * enabled when switch is controlled by user and default mode is supplied
+ * by board file, which can be changed by userspace later.
+ */
+static void msm_otg_init_sm(struct msm_otg *motg)
+{
+ struct msm_otg_platform_data *pdata = motg->pdata;
+ u32 otgsc = readl(USB_OTGSC);
+
+ switch (pdata->mode) {
+ case USB_OTG:
+ if (pdata->otg_control == OTG_PHY_CONTROL) {
+ if (otgsc & OTGSC_ID)
+ set_bit(ID, &motg->inputs);
+ else
+ clear_bit(ID, &motg->inputs);
+
+ if (otgsc & OTGSC_BSV)
+ set_bit(B_SESS_VLD, &motg->inputs);
+ else
+ clear_bit(B_SESS_VLD, &motg->inputs);
+ } else if (pdata->otg_control == OTG_USER_CONTROL) {
+ if (pdata->default_mode == USB_HOST) {
+ clear_bit(ID, &motg->inputs);
+ } else if (pdata->default_mode == USB_PERIPHERAL) {
+ set_bit(ID, &motg->inputs);
+ set_bit(B_SESS_VLD, &motg->inputs);
+ } else {
+ set_bit(ID, &motg->inputs);
+ clear_bit(B_SESS_VLD, &motg->inputs);
+ }
+ }
+ break;
+ case USB_HOST:
+ clear_bit(ID, &motg->inputs);
+ break;
+ case USB_PERIPHERAL:
+ set_bit(ID, &motg->inputs);
+ if (otgsc & OTGSC_BSV)
+ set_bit(B_SESS_VLD, &motg->inputs);
+ else
+ clear_bit(B_SESS_VLD, &motg->inputs);
+ break;
+ default:
+ break;
+ }
+}
+
+static void msm_otg_sm_work(struct work_struct *w)
+{
+ struct msm_otg *motg = container_of(w, struct msm_otg, sm_work);
+ struct otg_transceiver *otg = &motg->otg;
+
+ switch (otg->state) {
+ case OTG_STATE_UNDEFINED:
+ dev_dbg(otg->dev, "OTG_STATE_UNDEFINED state\n");
+ msm_otg_reset(otg);
+ msm_otg_init_sm(motg);
+ otg->state = OTG_STATE_B_IDLE;
+ /* FALL THROUGH */
+ case OTG_STATE_B_IDLE:
+ dev_dbg(otg->dev, "OTG_STATE_B_IDLE state\n");
+ if (!test_bit(ID, &motg->inputs) && otg->host) {
+ /* disable BSV bit */
+ writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC);
+ msm_otg_start_host(otg, 1);
+ otg->state = OTG_STATE_A_HOST;
+ } else if (test_bit(B_SESS_VLD, &motg->inputs) && otg->gadget) {
+ msm_otg_start_peripheral(otg, 1);
+ otg->state = OTG_STATE_B_PERIPHERAL;
+ }
+ pm_runtime_put_sync(otg->dev);
+ break;
+ case OTG_STATE_B_PERIPHERAL:
+ dev_dbg(otg->dev, "OTG_STATE_B_PERIPHERAL state\n");
+ if (!test_bit(B_SESS_VLD, &motg->inputs) ||
+ !test_bit(ID, &motg->inputs)) {
+ msm_otg_start_peripheral(otg, 0);
+ otg->state = OTG_STATE_B_IDLE;
+ msm_otg_reset(otg);
+ schedule_work(w);
+ }
+ break;
+ case OTG_STATE_A_HOST:
+ dev_dbg(otg->dev, "OTG_STATE_A_HOST state\n");
+ if (test_bit(ID, &motg->inputs)) {
+ msm_otg_start_host(otg, 0);
+ otg->state = OTG_STATE_B_IDLE;
+ msm_otg_reset(otg);
+ schedule_work(w);
+ }
+ break;
+ default:
+ break;
+ }
+}
+
+static irqreturn_t msm_otg_irq(int irq, void *data)
+{
+ struct msm_otg *motg = data;
+ struct otg_transceiver *otg = &motg->otg;
+ u32 otgsc = 0;
+
+ if (atomic_read(&motg->in_lpm)) {
+ disable_irq_nosync(irq);
+ motg->async_int = 1;
+ pm_runtime_get(otg->dev);
+ return IRQ_HANDLED;
+ }
+
+ otgsc = readl(USB_OTGSC);
+ if (!(otgsc & (OTGSC_IDIS | OTGSC_BSVIS)))
+ return IRQ_NONE;
+
+ if ((otgsc & OTGSC_IDIS) && (otgsc & OTGSC_IDIE)) {
+ if (otgsc & OTGSC_ID)
+ set_bit(ID, &motg->inputs);
+ else
+ clear_bit(ID, &motg->inputs);
+ dev_dbg(otg->dev, "ID set/clear\n");
+ pm_runtime_get_noresume(otg->dev);
+ } else if ((otgsc & OTGSC_BSVIS) && (otgsc & OTGSC_BSVIE)) {
+ if (otgsc & OTGSC_BSV)
+ set_bit(B_SESS_VLD, &motg->inputs);
+ else
+ clear_bit(B_SESS_VLD, &motg->inputs);
+ dev_dbg(otg->dev, "BSV set/clear\n");
+ pm_runtime_get_noresume(otg->dev);
+ }
+
+ writel(otgsc, USB_OTGSC);
+ schedule_work(&motg->sm_work);
+ return IRQ_HANDLED;
+}
+
+static int msm_otg_mode_show(struct seq_file *s, void *unused)
+{
+ struct msm_otg *motg = s->private;
+ struct otg_transceiver *otg = &motg->otg;
+
+ switch (otg->state) {
+ case OTG_STATE_A_HOST:
+ seq_printf(s, "host\n");
+ break;
+ case OTG_STATE_B_PERIPHERAL:
+ seq_printf(s, "peripheral\n");
+ break;
+ default:
+ seq_printf(s, "none\n");
+ break;
+ }
+
+ return 0;
+}
+
+static int msm_otg_mode_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, msm_otg_mode_show, inode->i_private);
+}
+
+static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf,
+ size_t count, loff_t *ppos)
+{
+ struct msm_otg *motg = file->private_data;
+ char buf[16];
+ struct otg_transceiver *otg = &motg->otg;
+ int status = count;
+ enum usb_mode_type req_mode;
+
+ memset(buf, 0x00, sizeof(buf));
+
+ if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) {
+ status = -EFAULT;
+ goto out;
+ }
+
+ if (!strncmp(buf, "host", 4)) {
+ req_mode = USB_HOST;
+ } else if (!strncmp(buf, "peripheral", 10)) {
+ req_mode = USB_PERIPHERAL;
+ } else if (!strncmp(buf, "none", 4)) {
+ req_mode = USB_NONE;
+ } else {
+ status = -EINVAL;
+ goto out;
+ }
+
+ switch (req_mode) {
+ case USB_NONE:
+ switch (otg->state) {
+ case OTG_STATE_A_HOST:
+ case OTG_STATE_B_PERIPHERAL:
+ set_bit(ID, &motg->inputs);
+ clear_bit(B_SESS_VLD, &motg->inputs);
+ break;
+ default:
+ goto out;
+ }
+ break;
+ case USB_PERIPHERAL:
+ switch (otg->state) {
+ case OTG_STATE_B_IDLE:
+ case OTG_STATE_A_HOST:
+ set_bit(ID, &motg->inputs);
+ set_bit(B_SESS_VLD, &motg->inputs);
+ break;
+ default:
+ goto out;
+ }
+ break;
+ case USB_HOST:
+ switch (otg->state) {
+ case OTG_STATE_B_IDLE:
+ case OTG_STATE_B_PERIPHERAL:
+ clear_bit(ID, &motg->inputs);
+ break;
+ default:
+ goto out;
+ }
+ break;
+ default:
+ goto out;
+ }
+
+ pm_runtime_get_sync(otg->dev);
+ schedule_work(&motg->sm_work);
+out:
+ return status;
+}
+
+const struct file_operations msm_otg_mode_fops = {
+ .open = msm_otg_mode_open,
+ .read = seq_read,
+ .write = msm_otg_mode_write,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static struct dentry *msm_otg_dbg_root;
+static struct dentry *msm_otg_dbg_mode;
+
+static int msm_otg_debugfs_init(struct msm_otg *motg)
+{
+ msm_otg_dbg_root = debugfs_create_dir("msm_otg", NULL);
+
+ if (!msm_otg_dbg_root || IS_ERR(msm_otg_dbg_root))
+ return -ENODEV;
+
+ msm_otg_dbg_mode = debugfs_create_file("mode", S_IRUGO | S_IWUSR,
+ msm_otg_dbg_root, motg, &msm_otg_mode_fops);
+ if (!msm_otg_dbg_mode) {
+ debugfs_remove(msm_otg_dbg_root);
+ msm_otg_dbg_root = NULL;
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static void msm_otg_debugfs_cleanup(void)
+{
+ debugfs_remove(msm_otg_dbg_mode);
+ debugfs_remove(msm_otg_dbg_root);
+}
+
+static int __init msm_otg_probe(struct platform_device *pdev)
+{
+ int ret = 0;
+ struct resource *res;
+ struct msm_otg *motg;
+ struct otg_transceiver *otg;
+
+ dev_info(&pdev->dev, "msm_otg probe\n");
+ if (!pdev->dev.platform_data) {
+ dev_err(&pdev->dev, "No platform data given. Bailing out\n");
+ return -ENODEV;
+ }
+
+ motg = kzalloc(sizeof(struct msm_otg), GFP_KERNEL);
+ if (!motg) {
+ dev_err(&pdev->dev, "unable to allocate msm_otg\n");
+ return -ENOMEM;
+ }
+
+ motg->pdata = pdev->dev.platform_data;
+ otg = &motg->otg;
+ otg->dev = &pdev->dev;
+
+ motg->phy_reset_clk = clk_get(&pdev->dev, "usb_phy_clk");
+ if (IS_ERR(motg->phy_reset_clk)) {
+ dev_err(&pdev->dev, "failed to get usb_phy_clk\n");
+ ret = PTR_ERR(motg->phy_reset_clk);
+ goto free_motg;
+ }
+
+ motg->clk = clk_get(&pdev->dev, "usb_hs_clk");
+ if (IS_ERR(motg->clk)) {
+ dev_err(&pdev->dev, "failed to get usb_hs_clk\n");
+ ret = PTR_ERR(motg->clk);
+ goto put_phy_reset_clk;
+ }
+
+ motg->pclk = clk_get(&pdev->dev, "usb_hs_pclk");
+ if (IS_ERR(motg->pclk)) {
+ dev_err(&pdev->dev, "failed to get usb_hs_pclk\n");
+ ret = PTR_ERR(motg->pclk);
+ goto put_clk;
+ }
+
+ /*
+ * USB core clock is not present on all MSM chips. This
+ * clock is introduced to remove the dependency on AXI
+ * bus frequency.
+ */
+ motg->core_clk = clk_get(&pdev->dev, "usb_hs_core_clk");
+ if (IS_ERR(motg->core_clk))
+ motg->core_clk = NULL;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_err(&pdev->dev, "failed to get platform resource mem\n");
+ ret = -ENODEV;
+ goto put_core_clk;
+ }
+
+ motg->regs = ioremap(res->start, resource_size(res));
+ if (!motg->regs) {
+ dev_err(&pdev->dev, "ioremap failed\n");
+ ret = -ENOMEM;
+ goto put_core_clk;
+ }
+ dev_info(&pdev->dev, "OTG regs = %p\n", motg->regs);
+
+ motg->irq = platform_get_irq(pdev, 0);
+ if (!motg->irq) {
+ dev_err(&pdev->dev, "platform_get_irq failed\n");
+ ret = -ENODEV;
+ goto free_regs;
+ }
+
+ clk_enable(motg->clk);
+ clk_enable(motg->pclk);
+ if (motg->core_clk)
+ clk_enable(motg->core_clk);
+
+ writel(0, USB_USBINTR);
+ writel(0, USB_OTGSC);
+
+ INIT_WORK(&motg->sm_work, msm_otg_sm_work);
+ ret = request_irq(motg->irq, msm_otg_irq, IRQF_SHARED,
+ "msm_otg", motg);
+ if (ret) {
+ dev_err(&pdev->dev, "request irq failed\n");
+ goto disable_clks;
+ }
+
+ otg->init = msm_otg_reset;
+ otg->set_host = msm_otg_set_host;
+ otg->set_peripheral = msm_otg_set_peripheral;
+
+ otg->io_ops = &msm_otg_io_ops;
+
+ ret = otg_set_transceiver(&motg->otg);
+ if (ret) {
+ dev_err(&pdev->dev, "otg_set_transceiver failed\n");
+ goto free_irq;
+ }
+
+ platform_set_drvdata(pdev, motg);
+ device_init_wakeup(&pdev->dev, 1);
+
+ if (motg->pdata->mode == USB_OTG &&
+ motg->pdata->otg_control == OTG_USER_CONTROL) {
+ ret = msm_otg_debugfs_init(motg);
+ if (ret)
+ dev_dbg(&pdev->dev, "mode debugfs file is"
+ "not available\n");
+ }
+
+ pm_runtime_set_active(&pdev->dev);
+ pm_runtime_enable(&pdev->dev);
+
+ return 0;
+free_irq:
+ free_irq(motg->irq, motg);
+disable_clks:
+ clk_disable(motg->pclk);
+ clk_disable(motg->clk);
+free_regs:
+ iounmap(motg->regs);
+put_core_clk:
+ if (motg->core_clk)
+ clk_put(motg->core_clk);
+ clk_put(motg->pclk);
+put_clk:
+ clk_put(motg->clk);
+put_phy_reset_clk:
+ clk_put(motg->phy_reset_clk);
+free_motg:
+ kfree(motg);
+ return ret;
+}
+
+static int __devexit msm_otg_remove(struct platform_device *pdev)
+{
+ struct msm_otg *motg = platform_get_drvdata(pdev);
+ struct otg_transceiver *otg = &motg->otg;
+ int cnt = 0;
+
+ if (otg->host || otg->gadget)
+ return -EBUSY;
+
+ msm_otg_debugfs_cleanup();
+ cancel_work_sync(&motg->sm_work);
+
+ msm_otg_resume(motg);
+
+ device_init_wakeup(&pdev->dev, 0);
+ pm_runtime_disable(&pdev->dev);
+
+ otg_set_transceiver(NULL);
+ free_irq(motg->irq, motg);
+
+ /*
+ * Put PHY in low power mode.
+ */
+ ulpi_read(otg, 0x14);
+ ulpi_write(otg, 0x08, 0x09);
+
+ writel(readl(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC);
+ while (cnt < PHY_SUSPEND_TIMEOUT_USEC) {
+ if (readl(USB_PORTSC) & PORTSC_PHCD)
+ break;
+ udelay(1);
+ cnt++;
+ }
+ if (cnt >= PHY_SUSPEND_TIMEOUT_USEC)
+ dev_err(otg->dev, "Unable to suspend PHY\n");
+
+ clk_disable(motg->pclk);
+ clk_disable(motg->clk);
+ if (motg->core_clk)
+ clk_disable(motg->core_clk);
+
+ iounmap(motg->regs);
+ pm_runtime_set_suspended(&pdev->dev);
+
+ clk_put(motg->phy_reset_clk);
+ clk_put(motg->pclk);
+ clk_put(motg->clk);
+ if (motg->core_clk)
+ clk_put(motg->core_clk);
+
+ kfree(motg);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_RUNTIME
+static int msm_otg_runtime_idle(struct device *dev)
+{
+ struct msm_otg *motg = dev_get_drvdata(dev);
+ struct otg_transceiver *otg = &motg->otg;
+
+ dev_dbg(dev, "OTG runtime idle\n");
+
+ /*
+ * It is observed some times that a spurious interrupt
+ * comes when PHY is put into LPM immediately after PHY reset.
+ * This 1 sec delay also prevents entering into LPM immediately
+ * after asynchronous interrupt.
+ */
+ if (otg->state != OTG_STATE_UNDEFINED)
+ pm_schedule_suspend(dev, 1000);
+
+ return -EAGAIN;
+}
+
+static int msm_otg_runtime_suspend(struct device *dev)
+{
+ struct msm_otg *motg = dev_get_drvdata(dev);
+
+ dev_dbg(dev, "OTG runtime suspend\n");
+ return msm_otg_suspend(motg);
+}
+
+static int msm_otg_runtime_resume(struct device *dev)
+{
+ struct msm_otg *motg = dev_get_drvdata(dev);
+
+ dev_dbg(dev, "OTG runtime resume\n");
+ return msm_otg_resume(motg);
+}
+#else
+#define msm_otg_runtime_idle NULL
+#define msm_otg_runtime_suspend NULL
+#define msm_otg_runtime_resume NULL
+#endif
+
+#ifdef CONFIG_PM
+static int msm_otg_pm_suspend(struct device *dev)
+{
+ struct msm_otg *motg = dev_get_drvdata(dev);
+
+ dev_dbg(dev, "OTG PM suspend\n");
+ return msm_otg_suspend(motg);
+}
+
+static int msm_otg_pm_resume(struct device *dev)
+{
+ struct msm_otg *motg = dev_get_drvdata(dev);
+ int ret;
+
+ dev_dbg(dev, "OTG PM resume\n");
+
+ ret = msm_otg_resume(motg);
+ if (ret)
+ return ret;
+
+ /*
+ * Runtime PM Documentation recommends bringing the
+ * device to full powered state upon resume.
+ */
+ pm_runtime_disable(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+
+ return 0;
+}
+#else
+#define msm_otg_pm_suspend NULL
+#define msm_otg_pm_resume NULL
+#endif
+
+static const struct dev_pm_ops msm_otg_dev_pm_ops = {
+ .runtime_suspend = msm_otg_runtime_suspend,
+ .runtime_resume = msm_otg_runtime_resume,
+ .runtime_idle = msm_otg_runtime_idle,
+ .suspend = msm_otg_pm_suspend,
+ .resume = msm_otg_pm_resume,
+};
+
+static struct platform_driver msm_otg_driver = {
+ .remove = __devexit_p(msm_otg_remove),
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .pm = &msm_otg_dev_pm_ops,
+ },
+};
+
+static int __init msm_otg_init(void)
+{
+ return platform_driver_probe(&msm_otg_driver, msm_otg_probe);
+}
+
+static void __exit msm_otg_exit(void)
+{
+ platform_driver_unregister(&msm_otg_driver);
+}
+
+module_init(msm_otg_init);
+module_exit(msm_otg_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("MSM USB transceiver driver");
diff --git a/drivers/usb/otg/twl4030-usb.c b/drivers/usb/otg/twl4030-usb.c
index d335f484fcd..6ca505f333e 100644
--- a/drivers/usb/otg/twl4030-usb.c
+++ b/drivers/usb/otg/twl4030-usb.c
@@ -678,7 +678,8 @@ static int __exit twl4030_usb_remove(struct platform_device *pdev)
/* disable complete OTG block */
twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
- twl4030_phy_power(twl, 0);
+ if (!twl->asleep)
+ twl4030_phy_power(twl, 0);
regulator_put(twl->usb1v5);
regulator_put(twl->usb1v8);
regulator_put(twl->usb3v1);
diff --git a/drivers/usb/otg/twl6030-usb.c b/drivers/usb/otg/twl6030-usb.c
new file mode 100644
index 00000000000..28f77010364
--- /dev/null
+++ b/drivers/usb/otg/twl6030-usb.c
@@ -0,0 +1,493 @@
+/*
+ * twl6030_usb - TWL6030 USB transceiver, talking to OMAP OTG driver.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: Hema HK <hemahk@ti.com>
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/usb/otg.h>
+#include <linux/i2c/twl.h>
+#include <linux/regulator/consumer.h>
+#include <linux/err.h>
+#include <linux/notifier.h>
+#include <linux/slab.h>
+
+/* usb register definitions */
+#define USB_VENDOR_ID_LSB 0x00
+#define USB_VENDOR_ID_MSB 0x01
+#define USB_PRODUCT_ID_LSB 0x02
+#define USB_PRODUCT_ID_MSB 0x03
+#define USB_VBUS_CTRL_SET 0x04
+#define USB_VBUS_CTRL_CLR 0x05
+#define USB_ID_CTRL_SET 0x06
+#define USB_ID_CTRL_CLR 0x07
+#define USB_VBUS_INT_SRC 0x08
+#define USB_VBUS_INT_LATCH_SET 0x09
+#define USB_VBUS_INT_LATCH_CLR 0x0A
+#define USB_VBUS_INT_EN_LO_SET 0x0B
+#define USB_VBUS_INT_EN_LO_CLR 0x0C
+#define USB_VBUS_INT_EN_HI_SET 0x0D
+#define USB_VBUS_INT_EN_HI_CLR 0x0E
+#define USB_ID_INT_SRC 0x0F
+#define USB_ID_INT_LATCH_SET 0x10
+#define USB_ID_INT_LATCH_CLR 0x11
+
+#define USB_ID_INT_EN_LO_SET 0x12
+#define USB_ID_INT_EN_LO_CLR 0x13
+#define USB_ID_INT_EN_HI_SET 0x14
+#define USB_ID_INT_EN_HI_CLR 0x15
+#define USB_OTG_ADP_CTRL 0x16
+#define USB_OTG_ADP_HIGH 0x17
+#define USB_OTG_ADP_LOW 0x18
+#define USB_OTG_ADP_RISE 0x19
+#define USB_OTG_REVISION 0x1A
+
+/* to be moved to LDO */
+#define TWL6030_MISC2 0xE5
+#define TWL6030_CFG_LDO_PD2 0xF5
+#define TWL6030_BACKUP_REG 0xFA
+
+#define STS_HW_CONDITIONS 0x21
+
+/* In module TWL6030_MODULE_PM_MASTER */
+#define STS_HW_CONDITIONS 0x21
+#define STS_USB_ID BIT(2)
+
+/* In module TWL6030_MODULE_PM_RECEIVER */
+#define VUSB_CFG_TRANS 0x71
+#define VUSB_CFG_STATE 0x72
+#define VUSB_CFG_VOLTAGE 0x73
+
+/* in module TWL6030_MODULE_MAIN_CHARGE */
+
+#define CHARGERUSB_CTRL1 0x8
+
+#define CONTROLLER_STAT1 0x03
+#define VBUS_DET BIT(2)
+
+struct twl6030_usb {
+ struct otg_transceiver otg;
+ struct device *dev;
+
+ /* for vbus reporting with irqs disabled */
+ spinlock_t lock;
+
+ struct regulator *usb3v3;
+
+ int irq1;
+ int irq2;
+ u8 linkstat;
+ u8 asleep;
+ bool irq_enabled;
+};
+
+#define xceiv_to_twl(x) container_of((x), struct twl6030_usb, otg);
+
+/*-------------------------------------------------------------------------*/
+
+static inline int twl6030_writeb(struct twl6030_usb *twl, u8 module,
+ u8 data, u8 address)
+{
+ int ret = 0;
+
+ ret = twl_i2c_write_u8(module, data, address);
+ if (ret < 0)
+ dev_err(twl->dev,
+ "Write[0x%x] Error %d\n", address, ret);
+ return ret;
+}
+
+static inline u8 twl6030_readb(struct twl6030_usb *twl, u8 module, u8 address)
+{
+ u8 data, ret = 0;
+
+ ret = twl_i2c_read_u8(module, &data, address);
+ if (ret >= 0)
+ ret = data;
+ else
+ dev_err(twl->dev,
+ "readb[0x%x,0x%x] Error %d\n",
+ module, address, ret);
+ return ret;
+}
+
+/*-------------------------------------------------------------------------*/
+static int twl6030_set_phy_clk(struct otg_transceiver *x, int on)
+{
+ struct twl6030_usb *twl;
+ struct device *dev;
+ struct twl4030_usb_data *pdata;
+
+ twl = xceiv_to_twl(x);
+ dev = twl->dev;
+ pdata = dev->platform_data;
+
+ pdata->phy_set_clock(twl->dev, on);
+
+ return 0;
+}
+
+static int twl6030_phy_init(struct otg_transceiver *x)
+{
+ u8 hw_state;
+ struct twl6030_usb *twl;
+ struct device *dev;
+ struct twl4030_usb_data *pdata;
+
+ twl = xceiv_to_twl(x);
+ dev = twl->dev;
+ pdata = dev->platform_data;
+
+ regulator_enable(twl->usb3v3);
+
+ hw_state = twl6030_readb(twl, TWL6030_MODULE_ID0, STS_HW_CONDITIONS);
+
+ if (hw_state & STS_USB_ID)
+ pdata->phy_power(twl->dev, 1, 1);
+ else
+ pdata->phy_power(twl->dev, 0, 1);
+
+ return 0;
+}
+
+static void twl6030_phy_shutdown(struct otg_transceiver *x)
+{
+ struct twl6030_usb *twl;
+ struct device *dev;
+ struct twl4030_usb_data *pdata;
+
+ twl = xceiv_to_twl(x);
+ dev = twl->dev;
+ pdata = dev->platform_data;
+ pdata->phy_power(twl->dev, 0, 0);
+ regulator_disable(twl->usb3v3);
+}
+
+static int twl6030_usb_ldo_init(struct twl6030_usb *twl)
+{
+
+ /* Set to OTG_REV 1.3 and turn on the ID_WAKEUP_COMP */
+ twl6030_writeb(twl, TWL6030_MODULE_ID0 , 0x1, TWL6030_BACKUP_REG);
+
+ /* Program CFG_LDO_PD2 register and set VUSB bit */
+ twl6030_writeb(twl, TWL6030_MODULE_ID0 , 0x1, TWL6030_CFG_LDO_PD2);
+
+ /* Program MISC2 register and set bit VUSB_IN_VBAT */
+ twl6030_writeb(twl, TWL6030_MODULE_ID0 , 0x10, TWL6030_MISC2);
+
+ twl->usb3v3 = regulator_get(twl->dev, "vusb");
+ if (IS_ERR(twl->usb3v3))
+ return -ENODEV;
+
+ regulator_enable(twl->usb3v3);
+
+ /* Program the VUSB_CFG_TRANS for ACTIVE state. */
+ twl6030_writeb(twl, TWL_MODULE_PM_RECEIVER, 0x3F,
+ VUSB_CFG_TRANS);
+
+ /* Program the VUSB_CFG_STATE register to ON on all groups. */
+ twl6030_writeb(twl, TWL_MODULE_PM_RECEIVER, 0xE1,
+ VUSB_CFG_STATE);
+
+ /* Program the USB_VBUS_CTRL_SET and set VBUS_ACT_COMP bit */
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x4, USB_VBUS_CTRL_SET);
+
+ /*
+ * Program the USB_ID_CTRL_SET register to enable GND drive
+ * and the ID comparators
+ */
+ twl6030_writeb(twl, TWL_MODULE_USB, 0x14, USB_ID_CTRL_SET);
+
+ return 0;
+}
+
+static ssize_t twl6030_usb_vbus_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct twl6030_usb *twl = dev_get_drvdata(dev);
+ unsigned long flags;
+ int ret = -EINVAL;
+
+ spin_lock_irqsave(&twl->lock, flags);
+
+ switch (twl->linkstat) {
+ case USB_EVENT_VBUS:
+ ret = snprintf(buf, PAGE_SIZE, "vbus\n");
+ break;
+ case USB_EVENT_ID:
+ ret = snprintf(buf, PAGE_SIZE, "id\n");
+ break;
+ case USB_EVENT_NONE:
+ ret = snprintf(buf, PAGE_SIZE, "none\n");
+ break;
+ default:
+ ret = snprintf(buf, PAGE_SIZE, "UNKNOWN\n");
+ }
+ spin_unlock_irqrestore(&twl->lock, flags);
+
+ return ret;
+}
+static DEVICE_ATTR(vbus, 0444, twl6030_usb_vbus_show, NULL);
+
+static irqreturn_t twl6030_usb_irq(int irq, void *_twl)
+{
+ struct twl6030_usb *twl = _twl;
+ int status;
+ u8 vbus_state, hw_state;
+
+ hw_state = twl6030_readb(twl, TWL6030_MODULE_ID0, STS_HW_CONDITIONS);
+
+ vbus_state = twl6030_readb(twl, TWL_MODULE_MAIN_CHARGE,
+ CONTROLLER_STAT1);
+ if (!(hw_state & STS_USB_ID)) {
+ if (vbus_state & VBUS_DET) {
+ status = USB_EVENT_VBUS;
+ twl->otg.default_a = false;
+ twl->otg.state = OTG_STATE_B_IDLE;
+ } else {
+ status = USB_EVENT_NONE;
+ }
+ if (status >= 0) {
+ twl->linkstat = status;
+ blocking_notifier_call_chain(&twl->otg.notifier,
+ status, twl->otg.gadget);
+ }
+ }
+ sysfs_notify(&twl->dev->kobj, NULL, "vbus");
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t twl6030_usbotg_irq(int irq, void *_twl)
+{
+ struct twl6030_usb *twl = _twl;
+ int status = USB_EVENT_NONE;
+ u8 hw_state;
+
+ hw_state = twl6030_readb(twl, TWL6030_MODULE_ID0, STS_HW_CONDITIONS);
+
+ if (hw_state & STS_USB_ID) {
+
+ twl6030_writeb(twl, TWL_MODULE_USB, USB_ID_INT_EN_HI_CLR, 0x1);
+ twl6030_writeb(twl, TWL_MODULE_USB, USB_ID_INT_EN_HI_SET,
+ 0x10);
+ status = USB_EVENT_ID;
+ twl->otg.default_a = true;
+ twl->otg.state = OTG_STATE_A_IDLE;
+ blocking_notifier_call_chain(&twl->otg.notifier, status,
+ twl->otg.gadget);
+ } else {
+ twl6030_writeb(twl, TWL_MODULE_USB, USB_ID_INT_EN_HI_CLR,
+ 0x10);
+ twl6030_writeb(twl, TWL_MODULE_USB, USB_ID_INT_EN_HI_SET,
+ 0x1);
+ }
+ twl6030_writeb(twl, TWL_MODULE_USB, USB_ID_INT_LATCH_CLR, status);
+ twl->linkstat = status;
+
+ return IRQ_HANDLED;
+}
+
+static int twl6030_set_peripheral(struct otg_transceiver *x,
+ struct usb_gadget *gadget)
+{
+ struct twl6030_usb *twl;
+
+ if (!x)
+ return -ENODEV;
+
+ twl = xceiv_to_twl(x);
+ twl->otg.gadget = gadget;
+ if (!gadget)
+ twl->otg.state = OTG_STATE_UNDEFINED;
+
+ return 0;
+}
+
+static int twl6030_enable_irq(struct otg_transceiver *x)
+{
+ struct twl6030_usb *twl = xceiv_to_twl(x);
+
+ twl6030_writeb(twl, TWL_MODULE_USB, USB_ID_INT_EN_HI_SET, 0x1);
+ twl6030_interrupt_unmask(0x05, REG_INT_MSK_LINE_C);
+ twl6030_interrupt_unmask(0x05, REG_INT_MSK_STS_C);
+
+ twl6030_interrupt_unmask(TWL6030_CHARGER_CTRL_INT_MASK,
+ REG_INT_MSK_LINE_C);
+ twl6030_interrupt_unmask(TWL6030_CHARGER_CTRL_INT_MASK,
+ REG_INT_MSK_STS_C);
+ twl6030_usb_irq(twl->irq2, twl);
+ twl6030_usbotg_irq(twl->irq1, twl);
+
+ return 0;
+}
+
+static int twl6030_set_vbus(struct otg_transceiver *x, bool enabled)
+{
+ struct twl6030_usb *twl = xceiv_to_twl(x);
+
+ /*
+ * Start driving VBUS. Set OPA_MODE bit in CHARGERUSB_CTRL1
+ * register. This enables boost mode.
+ */
+ if (enabled)
+ twl6030_writeb(twl, TWL_MODULE_MAIN_CHARGE , 0x40,
+ CHARGERUSB_CTRL1);
+ else
+ twl6030_writeb(twl, TWL_MODULE_MAIN_CHARGE , 0x00,
+ CHARGERUSB_CTRL1);
+ return 0;
+}
+
+static int twl6030_set_host(struct otg_transceiver *x, struct usb_bus *host)
+{
+ struct twl6030_usb *twl;
+
+ if (!x)
+ return -ENODEV;
+
+ twl = xceiv_to_twl(x);
+ twl->otg.host = host;
+ if (!host)
+ twl->otg.state = OTG_STATE_UNDEFINED;
+ return 0;
+}
+
+static int __devinit twl6030_usb_probe(struct platform_device *pdev)
+{
+ struct twl6030_usb *twl;
+ int status, err;
+ struct twl4030_usb_data *pdata;
+ struct device *dev = &pdev->dev;
+ pdata = dev->platform_data;
+
+ twl = kzalloc(sizeof *twl, GFP_KERNEL);
+ if (!twl)
+ return -ENOMEM;
+
+ twl->dev = &pdev->dev;
+ twl->irq1 = platform_get_irq(pdev, 0);
+ twl->irq2 = platform_get_irq(pdev, 1);
+ twl->otg.dev = twl->dev;
+ twl->otg.label = "twl6030";
+ twl->otg.set_host = twl6030_set_host;
+ twl->otg.set_peripheral = twl6030_set_peripheral;
+ twl->otg.set_vbus = twl6030_set_vbus;
+ twl->otg.init = twl6030_phy_init;
+ twl->otg.shutdown = twl6030_phy_shutdown;
+
+ /* init spinlock for workqueue */
+ spin_lock_init(&twl->lock);
+
+ err = twl6030_usb_ldo_init(twl);
+ if (err) {
+ dev_err(&pdev->dev, "ldo init failed\n");
+ kfree(twl);
+ return err;
+ }
+ otg_set_transceiver(&twl->otg);
+
+ platform_set_drvdata(pdev, twl);
+ if (device_create_file(&pdev->dev, &dev_attr_vbus))
+ dev_warn(&pdev->dev, "could not create sysfs file\n");
+
+ BLOCKING_INIT_NOTIFIER_HEAD(&twl->otg.notifier);
+
+ twl->irq_enabled = true;
+ status = request_threaded_irq(twl->irq1, NULL, twl6030_usbotg_irq,
+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+ "twl6030_usb", twl);
+ if (status < 0) {
+ dev_err(&pdev->dev, "can't get IRQ %d, err %d\n",
+ twl->irq1, status);
+ device_remove_file(twl->dev, &dev_attr_vbus);
+ kfree(twl);
+ return status;
+ }
+
+ status = request_threaded_irq(twl->irq2, NULL, twl6030_usb_irq,
+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+ "twl6030_usb", twl);
+ if (status < 0) {
+ dev_err(&pdev->dev, "can't get IRQ %d, err %d\n",
+ twl->irq2, status);
+ free_irq(twl->irq1, twl);
+ device_remove_file(twl->dev, &dev_attr_vbus);
+ kfree(twl);
+ return status;
+ }
+
+ pdata->phy_init(dev);
+ twl6030_enable_irq(&twl->otg);
+ dev_info(&pdev->dev, "Initialized TWL6030 USB module\n");
+
+ return 0;
+}
+
+static int __exit twl6030_usb_remove(struct platform_device *pdev)
+{
+ struct twl6030_usb *twl = platform_get_drvdata(pdev);
+
+ struct twl4030_usb_data *pdata;
+ struct device *dev = &pdev->dev;
+ pdata = dev->platform_data;
+
+ twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK,
+ REG_INT_MSK_LINE_C);
+ twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK,
+ REG_INT_MSK_STS_C);
+ free_irq(twl->irq1, twl);
+ free_irq(twl->irq2, twl);
+ regulator_put(twl->usb3v3);
+ pdata->phy_exit(twl->dev);
+ device_remove_file(twl->dev, &dev_attr_vbus);
+ kfree(twl);
+
+ return 0;
+}
+
+static struct platform_driver twl6030_usb_driver = {
+ .probe = twl6030_usb_probe,
+ .remove = __exit_p(twl6030_usb_remove),
+ .driver = {
+ .name = "twl6030_usb",
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init twl6030_usb_init(void)
+{
+ return platform_driver_register(&twl6030_usb_driver);
+}
+subsys_initcall(twl6030_usb_init);
+
+static void __exit twl6030_usb_exit(void)
+{
+ platform_driver_unregister(&twl6030_usb_driver);
+}
+module_exit(twl6030_usb_exit);
+
+MODULE_ALIAS("platform:twl6030_usb");
+MODULE_AUTHOR("Hema HK <hemahk@ti.com>");
+MODULE_DESCRIPTION("TWL6030 USB transceiver driver");
+MODULE_LICENSE("GPL");