diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2013-03-22 14:19:21 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-23 13:32:56 +0100 |
| commit | 4b71a570f2a7ace7bc3eef3ea7c261aa7db32674 (patch) | |
| tree | 179524b6ea56a5648306a43beea187f45fa9a58b /drivers | |
| parent | ad1c0b1974c31f16407f983b7e6ea3511ec2a726 (diff) | |
drm/i915: fix DSPADDR Gen check
The first version of commit "drm/i915: there's no DSPADDR register on
Haswell" added 2 "!IS_HASWELL" checks. When reviewing the patch, Ben
suggested to make these checks more future-proof, so when Daniel
applied the patch he fixed the first check but not the second. This
commit makes the second check also "future-proof".
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3380d02dff7..f1dbdd4cb09 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9420,7 +9420,7 @@ intel_display_print_error_state(struct seq_file *m, if (INTEL_INFO(dev)->gen <= 3) seq_printf(m, " SIZE: %08x\n", error->plane[i].size); seq_printf(m, " POS: %08x\n", error->plane[i].pos); - if (!IS_HASWELL(dev)) + if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) seq_printf(m, " ADDR: %08x\n", error->plane[i].addr); if (INTEL_INFO(dev)->gen >= 4) { seq_printf(m, " SURF: %08x\n", error->plane[i].surface); |