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authorNicolas Pitre <nicolas.pitre@linaro.org>2012-07-05 21:33:26 -0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2013-06-19 16:54:22 -0400
commiteb3525e4e0279291d89546a1d8c240079943b8b2 (patch)
tree99733c8df192a6133bcbfa2932196e379902018d /drivers
parent0ed7390292d925cfef71d29134451370c36b4112 (diff)
ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the x4 b.L configuration. Let's allow for GIC IDs to be discovered upon switcher initialization to support other b.L configurations such as the x1 one. Signed-off-by: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/irqchip/irq-gic.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index c212513bffd..29b876b98d4 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -668,6 +668,27 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
#ifdef CONFIG_BL_SWITCHER
/*
+ * gic_get_cpu_id - get the CPU interface ID for the specified CPU
+ *
+ * @cpu: the logical CPU number to get the GIC ID for.
+ *
+ * Return the CPU interface ID for the given logical CPU number,
+ * or -1 if the CPU number is too large or the interface ID is
+ * unknown (more than one bit set).
+ */
+int gic_get_cpu_id(unsigned int cpu)
+{
+ unsigned int cpu_bit;
+
+ if (cpu >= NR_GIC_CPU_IF)
+ return -1;
+ cpu_bit = gic_cpu_map[cpu];
+ if (cpu_bit & (cpu_bit - 1))
+ return -1;
+ return __ffs(cpu_bit);
+}
+
+/*
* gic_migrate_target - migrate IRQs to another PU interface
*
* @new_cpu_id: the CPU target ID to migrate IRQs to