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authorNicolas Pitre <nicolas.pitre@linaro.org>2012-07-05 21:33:26 -0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2013-05-13 19:02:06 -0400
commit8377eace77f29520928b6c675ead3c9a2bac10f3 (patch)
tree3ca8062d06441a9f632e0ee055af6f5d527c7238 /drivers
parent8f4f5923eee935287e777a489c185e2517a89534 (diff)
ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the x4 b.L configuration. Let's allow for GIC IDs to be discovered upon switcher initialization to support other b.L configurations such as the x1 one. Signed-off-by: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/irqchip/irq-gic.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index a64e871baa7..870d87e57d3 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -666,6 +666,27 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
#ifdef CONFIG_BL_SWITCHER
/*
+ * gic_get_cpu_id - get the CPU interface ID for the specified CPU
+ *
+ * @cpu: the logical CPU number to get the GIC ID for.
+ *
+ * Return the CPU interface ID for the given logical CPU number,
+ * or -1 if the CPU number is too large or the interface ID is
+ * unknown (more than one bit set).
+ */
+int gic_get_cpu_id(unsigned int cpu)
+{
+ unsigned int cpu_bit;
+
+ if (cpu >= NR_GIC_CPU_IF)
+ return -1;
+ cpu_bit = gic_cpu_map[cpu];
+ if (cpu_bit & (cpu_bit - 1))
+ return -1;
+ return __ffs(cpu_bit);
+}
+
+/*
* gic_migrate_target - migrate IRQs to another PU interface
*
* @new_cpu_id: the CPU target ID to migrate IRQs to