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authorLennert Buytenhek <buytenh@wantstofly.org>2006-09-18 23:21:38 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 10:25:45 +0100
commit38ce73ebd74a9a1738b73619557f2397c59ba628 (patch)
tree02c812c665d0bb9c6872f81ad64328306fa3157f /include/asm-arm/arch-iop32x
parent0b29de4a6ac0936f56b974a3c19bd9c24ac5b5d7 (diff)
[ARM] 3825/1: iop3xx: use cp6 enable/disable macros
Add CP6 enable/disable sequences to the timekeeping code and the IRQ code. As a result, we can't depend on CP6 access being enabled when we enter get_irqnr_and_base anymore, so switch the latter over to using memory-mapped accesses for now. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop32x')
-rw-r--r--include/asm-arm/arch-iop32x/entry-macro.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index 52d9435c6a3..00038c17317 100644
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -17,7 +17,8 @@
*/
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \irqnr, #0
- mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC
+ ldr \base, =IOP3XX_REG_ADDR(0x07D8)
+ ldr \irqstat, [\base] @ Read IINTSRC
cmp \irqstat, #0
beq 1001f
clz \irqnr, \irqstat