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authorJack Steiner <steiner@sgi.com>2006-03-02 16:02:28 -0600
committerTony Luck <tony.luck@intel.com>2006-03-24 13:14:41 -0800
commita9de98351436b25b3c2f234addb6d66a6a6f42f8 (patch)
tree72291671fe518c192ae2ba08c4dffb28b1a13f8b /include/asm-ia64
parent3ad5ef8b9d0d0cc2d4b2c63e766ef903d482dfc7 (diff)
[IA64] Increase max node count on SN platforms
Node number are kept in the cpu_to_node_map which is currently defined as u8. Change to u16 to accomodate larger node numbers. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64')
-rw-r--r--include/asm-ia64/numa.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-ia64/numa.h b/include/asm-ia64/numa.h
index 3ae128fe082..dae6aeb7b11 100644
--- a/include/asm-ia64/numa.h
+++ b/include/asm-ia64/numa.h
@@ -23,7 +23,7 @@
#include <asm/mmzone.h>
-extern u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
+extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
/* Stuff below this line could be architecture independent */