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authorChris Zankel <czankel@tensilica.com>2005-06-23 22:01:33 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-24 00:05:22 -0700
commit7282bee78798294bb1f0211a842cdb9f4872db3d (patch)
tree7a659275aaa7f4c741bd24eeb9f827b2f0a926d5 /include/asm-xtensa/platform-iss
parente344b63eeec7850b5e900e10c8a6c61d083fd3a4 (diff)
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 8
The attached patches provides part 8 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa/platform-iss')
-rw-r--r--include/asm-xtensa/platform-iss/hardware.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/include/asm-xtensa/platform-iss/hardware.h b/include/asm-xtensa/platform-iss/hardware.h
new file mode 100644
index 00000000000..22240f00180
--- /dev/null
+++ b/include/asm-xtensa/platform-iss/hardware.h
@@ -0,0 +1,29 @@
+/*
+ * include/asm-xtensa/platform-iss/hardware.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 Tensilica Inc.
+ */
+
+/*
+ * This file contains the default configuration of ISS.
+ */
+
+#ifndef __ASM_XTENSA_ISS_HARDWARE
+#define __ASM_XTENSA_ISS_HARDWARE
+
+/*
+ * Memory configuration.
+ */
+
+#define PLATFORM_DEFAULT_MEM_START XSHAL_RAM_PADDR
+#define PLATFORM_DEFAULT_MEM_SIZE XSHAL_RAM_VSIZE
+
+/*
+ * Interrupt configuration.
+ */
+
+#endif /* __ASM_XTENSA_ISS_HARDWARE */