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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-11 23:29:20 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-11 23:29:20 -0800 |
| commit | 4c4d285ad5665bfbd983b95fde8d7a477d24a361 (patch) | |
| tree | 05da51053d4c8943ae21ea0b152aef4c67eba19d /include | |
| parent | 56c8bc3b7ed3d24c665e2ce992f86a5bedffc852 (diff) | |
| parent | e64e1b11b14d363ac70fd13ab809969a6d7e42a8 (diff) | |
Merge tag 'rmobile-for-linus' of git://github.com/pmundt/linux-sh
SH/R-Mobile updates for 3.3 merge window.
* tag 'rmobile-for-linus' of git://github.com/pmundt/linux-sh: (32 commits)
arm: mach-shmobile: add a resource name for shdma
ARM: mach-shmobile: r8a7779 SMP support V3
ARM: mach-shmobile: Add kota2 defconfig.
ARM: mach-shmobile: Add marzen defconfig.
ARM: mach-shmobile: r8a7779 power domain support V2
ARM: mach-shmobile: Fix up marzen build for recent GIC changes.
ARM: mach-shmobile: r8a7779 PFC function support
ARM: mach-shmobile: Flush caches in platform_cpu_die()
ARM: mach-shmobile: Allow SoC specific CPU kill code
ARM: mach-shmobile: Fix headsmp.S code to use CPUINIT
ARM: mach-shmobile: clock-r8a7779: clkz/clkzs support
ARM: mach-shmobile: clock-r8a7779: add DIV4 clock support
ARM: mach-shmobile: Marzen LAN89218 support
ARM: mach-shmobile: Marzen SCIF2/SCIF4 support
ARM: mach-shmobile: r8a7779 PFC GPIO-only support V2
ARM: mach-shmobile: r8a7779 and Marzen base support V2
sh: pfc: Unlock register support
sh: pfc: Variable bitfield width config register support
sh: pfc: Add config_reg_helper() function
sh: pfc: Convert index to field and value pair
...
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/sh_pfc.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/include/linux/sh_pfc.h b/include/linux/sh_pfc.h index 91666a58529..5c15aed9c4b 100644 --- a/include/linux/sh_pfc.h +++ b/include/linux/sh_pfc.h @@ -45,12 +45,19 @@ struct pinmux_cfg_reg { unsigned long reg, reg_width, field_width; unsigned long *cnt; pinmux_enum_t *enum_ids; + unsigned long *var_field_width; }; #define PINMUX_CFG_REG(name, r, r_width, f_width) \ .reg = r, .reg_width = r_width, .field_width = f_width, \ .cnt = (unsigned long [r_width / f_width]) {}, \ - .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \ + .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) + +#define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \ + .reg = r, .reg_width = r_width, \ + .cnt = (unsigned long [r_width]) {}, \ + .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \ + .enum_ids = (pinmux_enum_t []) struct pinmux_data_reg { unsigned long reg, reg_width, reg_shadow; @@ -109,6 +116,8 @@ struct pinmux_info { unsigned int num_resources; struct pfc_window *window; + unsigned long unlock_reg; + struct gpio_chip chip; }; |