diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-07-24 13:37:37 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-07-24 13:37:37 -0700 |
commit | dbf7b5915b39bfff548e4c6a3a753fc291a60e25 (patch) | |
tree | 55c457a22aa869d2ab558317877138369ae5f9bb /sound/soc/pxa/mmp-sspa.h | |
parent | d14b7a419a664cd7c1c585c9e7fffee9e9051d53 (diff) | |
parent | c1b623d9e4117d18d244e9b7fb30d2c27aeaf074 (diff) |
Merge tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound update from Takashi Iwai:
"This is a fairly quiet release in all sound area. Only a little bit
of changes in the core side while most of changes are seen in the
drivers.
HD-audio:
- A few new codec additions for Nvidia, Realtek and VIA
- Intel Haswell audio support
- Support for "phantom" jacks for consistent jack reporting
- Major clean-ups in HDMI/DP driver codes
- A workaround for inverted digital-mic pins with Realtek codecs
- Removal of beep_mode=2 option
ASoC:
- Added the ability to add and remove DAPM paths dynamically, mostly
for reparenting on clock changes
- New machine drivers for Marvell Brownstone, ST-Ericsson Ux500
reference platform and ttc-dkp
- New CPU drivers for Blackfin BF6xx SPORTs in I2S mode, Marvell MMP,
Synopsis Designware I2S controllers, and SPEAr DMA and S/PDIF
- New CODEC drivers for Dialog DA732x, ST STA529, ST-Ericsson AB8500,
TI Isabelle and Wolfson Microelectronics WM5102 and WM5110
- DAPM fixes for the recent locking changes
- Fix for _PRE and _POST widgets (which have been broken for a few
releases now)
- A couple of minor driver updates
Misc
- Conversion to new dev_pm_ops in platform and PCI drivers
- LTC support and some fixes in PCXHR driver
- A few fixes and PM support for ISA OPti9xx and WSS cards
- Some TLV code cleanup
- Move driver-specific headers from include/sound to local dirs"
* tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (212 commits)
ASoC: dapm: Fix _PRE and _POST events for DAPM performance improvements
ALSA: hda - add dock support for Thinkpad X230 Tablet
ALSA: hda - Turn on PIN_OUT from hdmi playback prepare.
ASoC imx-audmux: add MX31_AUDMUX_PORT7_SSI_PINS_7 define
ASoC: littlemill: Add userspace control of the WM1250 I/O
ASoC: wm8994: Update micdet for irqdomain conversion
ALSA: hda - make sure alc268 does not OOPS on codec parse
ALSA: hda - Add support for Realtek ALC282
ALSA: hda - Fix index number conflicts of phantom jacks
ALSA: opti9xx: Fix section mismatch by PM support
ALSA: snd-opti9xx: Implement suspend/resume
ALSA: hda - Add new GPU codec ID to snd-hda
ALSA: hda - Fix driver type of Haswell controller to AZX_DRIVER_SCH
ALSA: hda - add Haswell HDMI codec id
ALSA: hda - Add DeviceID for Haswell HDA
ALSA: wss_lib: Fix resume on Yamaha OPL3-SAx
ALSA: wss_lib: fix suspend/resume
ALSA: es1938: replace TLV_DB_RANGE_HEAD with DECLARE_TLV_DB_RANGE
ALSA: tlv: add DECLARE_TLV_DB_RANGE()
ALSA: tlv: add DECLARE_TLV_CONTAINER()
...
Diffstat (limited to 'sound/soc/pxa/mmp-sspa.h')
-rw-r--r-- | sound/soc/pxa/mmp-sspa.h | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/sound/soc/pxa/mmp-sspa.h b/sound/soc/pxa/mmp-sspa.h new file mode 100644 index 00000000000..ea365cb9e78 --- /dev/null +++ b/sound/soc/pxa/mmp-sspa.h @@ -0,0 +1,92 @@ +/* + * linux/sound/soc/pxa/mmp-sspa.h + * + * Copyright (C) 2011 Marvell International Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ +#ifndef _MMP_SSPA_H +#define _MMP_SSPA_H + +/* + * SSPA Registers + */ +#define SSPA_RXD (0x00) +#define SSPA_RXID (0x04) +#define SSPA_RXCTL (0x08) +#define SSPA_RXSP (0x0c) +#define SSPA_RXFIFO_UL (0x10) +#define SSPA_RXINT_MASK (0x14) +#define SSPA_RXC (0x18) +#define SSPA_RXFIFO_NOFS (0x1c) +#define SSPA_RXFIFO_SIZE (0x20) + +#define SSPA_TXD (0x80) +#define SSPA_TXID (0x84) +#define SSPA_TXCTL (0x88) +#define SSPA_TXSP (0x8c) +#define SSPA_TXFIFO_LL (0x90) +#define SSPA_TXINT_MASK (0x94) +#define SSPA_TXC (0x98) +#define SSPA_TXFIFO_NOFS (0x9c) +#define SSPA_TXFIFO_SIZE (0xa0) + +/* SSPA Control Register */ +#define SSPA_CTL_XPH (1 << 31) /* Read Phase */ +#define SSPA_CTL_XFIG (1 << 15) /* Transmit Zeros when FIFO Empty */ +#define SSPA_CTL_JST (1 << 3) /* Audio Sample Justification */ +#define SSPA_CTL_XFRLEN2_MASK (7 << 24) +#define SSPA_CTL_XFRLEN2(x) ((x) << 24) /* Transmit Frame Length in Phase 2 */ +#define SSPA_CTL_XWDLEN2_MASK (7 << 21) +#define SSPA_CTL_XWDLEN2(x) ((x) << 21) /* Transmit Word Length in Phase 2 */ +#define SSPA_CTL_XDATDLY(x) ((x) << 19) /* Tansmit Data Delay */ +#define SSPA_CTL_XSSZ2_MASK (7 << 16) +#define SSPA_CTL_XSSZ2(x) ((x) << 16) /* Transmit Sample Audio Size */ +#define SSPA_CTL_XFRLEN1_MASK (7 << 8) +#define SSPA_CTL_XFRLEN1(x) ((x) << 8) /* Transmit Frame Length in Phase 1 */ +#define SSPA_CTL_XWDLEN1_MASK (7 << 5) +#define SSPA_CTL_XWDLEN1(x) ((x) << 5) /* Transmit Word Length in Phase 1 */ +#define SSPA_CTL_XSSZ1_MASK (7 << 0) +#define SSPA_CTL_XSSZ1(x) ((x) << 0) /* XSSZ1 */ + +#define SSPA_CTL_8_BITS (0x0) /* Sample Size */ +#define SSPA_CTL_12_BITS (0x1) +#define SSPA_CTL_16_BITS (0x2) +#define SSPA_CTL_20_BITS (0x3) +#define SSPA_CTL_24_BITS (0x4) +#define SSPA_CTL_32_BITS (0x5) + +/* SSPA Serial Port Register */ +#define SSPA_SP_WEN (1 << 31) /* Write Configuration Enable */ +#define SSPA_SP_MSL (1 << 18) /* Master Slave Configuration */ +#define SSPA_SP_CLKP (1 << 17) /* CLKP Polarity Clock Edge Select */ +#define SSPA_SP_FSP (1 << 16) /* FSP Polarity Clock Edge Select */ +#define SSPA_SP_FFLUSH (1 << 2) /* FIFO Flush */ +#define SSPA_SP_S_RST (1 << 1) /* Active High Reset Signal */ +#define SSPA_SP_S_EN (1 << 0) /* Serial Clock Domain Enable */ +#define SSPA_SP_FWID(x) ((x) << 20) /* Frame-Sync Width */ +#define SSPA_TXSP_FPER(x) ((x) << 4) /* Frame-Sync Active */ + +/* sspa clock sources */ +#define MMP_SSPA_CLK_PLL 0 +#define MMP_SSPA_CLK_VCXO 1 +#define MMP_SSPA_CLK_AUDIO 3 + +/* sspa pll id */ +#define MMP_SYSCLK 0 +#define MMP_SSPA_CLK 1 + +#endif /* _MMP_SSPA_H */ |