diff options
| -rw-r--r-- | Documentation/kernel-parameters.txt | 21 | ||||
| -rw-r--r-- | drivers/pci/access.c | 4 | ||||
| -rw-r--r-- | drivers/pci/hotplug/pciehp_core.c | 2 | ||||
| -rw-r--r-- | drivers/pci/pci.c | 17 | ||||
| -rw-r--r-- | drivers/pci/pcie/portdrv_core.c | 2 | ||||
| -rw-r--r-- | include/linux/pci.h | 11 |
6 files changed, 37 insertions, 20 deletions
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 363e348bff9..dd80599559a 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -2227,6 +2227,21 @@ bytes respectively. Such letter suffixes can also be entirely omitted. This sorting is done to get a device order compatible with older (<= 2.4) kernels. nobfsort Don't sort PCI devices into breadth-first order. + pcie_bus_tune_off Disable PCIe MPS (Max Payload Size) + tuning and use the BIOS-configured MPS defaults. + pcie_bus_safe Set every device's MPS to the largest value + supported by all devices below the root complex. + pcie_bus_perf Set device MPS to the largest allowable MPS + based on its parent bus. Also set MRRS (Max + Read Request Size) to the largest supported + value (no larger than the MPS that the device + or bus can support) for best performance. + pcie_bus_peer2peer Set every device's MPS to 128B, which + every device is guaranteed to support. This + configuration allows peer-to-peer DMA between + any pair of devices, possibly at the cost of + reduced performance. This also guarantees + that hot-added devices will work. cbiosize=nn[KMG] The fixed amount of bus space which is reserved for the CardBus bridge's IO window. The default value is 256 bytes. @@ -2248,6 +2263,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. the default. off: Turn ECRC off on: Turn ECRC on. + hpiosize=nn[KMG] The fixed amount of bus space which is + reserved for hotplug bridge's IO window. + Default size is 256 bytes. + hpmemsize=nn[KMG] The fixed amount of bus space which is + reserved for hotplug bridge's memory window. + Default size is 2 megabytes. realloc= Enable/disable reallocating PCI bridge resources if allocations done by BIOS are too small to accommodate resources required by all child diff --git a/drivers/pci/access.c b/drivers/pci/access.c index 3af0478c057..5278ac692cb 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c @@ -472,7 +472,7 @@ EXPORT_SYMBOL_GPL(pci_cfg_access_unlock); static inline int pcie_cap_version(const struct pci_dev *dev) { - return dev->pcie_flags_reg & PCI_EXP_FLAGS_VERS; + return pcie_caps_reg(dev) & PCI_EXP_FLAGS_VERS; } static inline bool pcie_cap_has_devctl(const struct pci_dev *dev) @@ -497,7 +497,7 @@ static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev) return pcie_cap_version(dev) > 1 || type == PCI_EXP_TYPE_ROOT_PORT || (type == PCI_EXP_TYPE_DOWNSTREAM && - dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT); + pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT); } static inline bool pcie_cap_has_rtctl(const struct pci_dev *dev) diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c index 916bf4f53ab..874a3baf1db 100644 --- a/drivers/pci/hotplug/pciehp_core.c +++ b/drivers/pci/hotplug/pciehp_core.c @@ -294,7 +294,6 @@ static void pciehp_remove(struct pcie_device *dev) #ifdef CONFIG_PM static int pciehp_suspend (struct pcie_device *dev) { - dev_info(&dev->device, "%s ENTRY\n", __func__); return 0; } @@ -304,7 +303,6 @@ static int pciehp_resume (struct pcie_device *dev) struct slot *slot; u8 status; - dev_info(&dev->device, "%s ENTRY\n", __func__); ctrl = get_service_data(dev); /* reinitialize the chipset's event detection logic */ diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 177a50ff645..393cf095a0c 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3748,18 +3748,6 @@ resource_size_t pci_specified_resource_alignment(struct pci_dev *dev) return align; } -/** - * pci_is_reassigndev - check if specified PCI is target device to reassign - * @dev: the PCI device to check - * - * RETURNS: non-zero for PCI device is a target device to reassign, - * or zero is not. - */ -int pci_is_reassigndev(struct pci_dev *dev) -{ - return (pci_specified_resource_alignment(dev) != 0); -} - /* * This function disables memory decoding and releases memory resources * of the device specified by kernel's boot parameter 'pci=resource_alignment='. @@ -3774,7 +3762,9 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) resource_size_t align, size; u16 command; - if (!pci_is_reassigndev(dev)) + /* check if specified PCI is target device to reassign */ + align = pci_specified_resource_alignment(dev); + if (!align) return; if (dev->hdr_type == PCI_HEADER_TYPE_NORMAL && @@ -3790,7 +3780,6 @@ void pci_reassigndev_resource_alignment(struct pci_dev *dev) command &= ~PCI_COMMAND_MEMORY; pci_write_config_word(dev, PCI_COMMAND, command); - align = pci_specified_resource_alignment(dev); for (i = 0; i < PCI_BRIDGE_RESOURCES; i++) { r = &dev->resource[i]; if (!(r->flags & IORESOURCE_MEM)) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index b42133afca9..31063ac3099 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -272,7 +272,7 @@ static int get_port_device_capability(struct pci_dev *dev) /* Hot-Plug Capable */ if ((cap_mask & PCIE_PORT_SERVICE_HP) && - dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT) { + pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) { pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); if (reg32 & PCI_EXP_SLTCAP_HPC) { services |= PCIE_PORT_SERVICE_HP; diff --git a/include/linux/pci.h b/include/linux/pci.h index 056d3d66b97..7e87b1ed217 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1697,12 +1697,21 @@ static inline bool pci_is_pcie(struct pci_dev *dev) } /** + * pcie_caps_reg - get the PCIe Capabilities Register + * @dev: PCI device + */ +static inline u16 pcie_caps_reg(const struct pci_dev *dev) +{ + return dev->pcie_flags_reg; +} + +/** * pci_pcie_type - get the PCIe device/port type * @dev: PCI device */ static inline int pci_pcie_type(const struct pci_dev *dev) { - return (dev->pcie_flags_reg & PCI_EXP_FLAGS_TYPE) >> 4; + return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4; } void pci_request_acs(void); |