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path: root/arch/mips/pci/msi-octeon.c
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Diffstat (limited to 'arch/mips/pci/msi-octeon.c')
-rw-r--r--arch/mips/pci/msi-octeon.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/mips/pci/msi-octeon.c b/arch/mips/pci/msi-octeon.c
index d8080499872..5d530f89d87 100644
--- a/arch/mips/pci/msi-octeon.c
+++ b/arch/mips/pci/msi-octeon.c
@@ -172,7 +172,7 @@ msi_irq_allocated:
pci_write_config_word(dev, desc->msi_attrib.pos + PCI_MSI_FLAGS,
control);
- set_irq_msi(irq, desc);
+ irq_set_msi_desc(irq, desc);
write_msi_msg(irq, &msg);
return 0;
}
@@ -259,11 +259,11 @@ static DEFINE_RAW_SPINLOCK(octeon_irq_msi_lock);
static u64 msi_rcv_reg[4];
static u64 mis_ena_reg[4];
-static void octeon_irq_msi_enable_pcie(unsigned int irq)
+static void octeon_irq_msi_enable_pcie(struct irq_data *data)
{
u64 en;
unsigned long flags;
- int msi_number = irq - OCTEON_IRQ_MSI_BIT0;
+ int msi_number = data->irq - OCTEON_IRQ_MSI_BIT0;
int irq_index = msi_number >> 6;
int irq_bit = msi_number & 0x3f;
@@ -275,11 +275,11 @@ static void octeon_irq_msi_enable_pcie(unsigned int irq)
raw_spin_unlock_irqrestore(&octeon_irq_msi_lock, flags);
}
-static void octeon_irq_msi_disable_pcie(unsigned int irq)
+static void octeon_irq_msi_disable_pcie(struct irq_data *data)
{
u64 en;
unsigned long flags;
- int msi_number = irq - OCTEON_IRQ_MSI_BIT0;
+ int msi_number = data->irq - OCTEON_IRQ_MSI_BIT0;
int irq_index = msi_number >> 6;
int irq_bit = msi_number & 0x3f;
@@ -293,11 +293,11 @@ static void octeon_irq_msi_disable_pcie(unsigned int irq)
static struct irq_chip octeon_irq_chip_msi_pcie = {
.name = "MSI",
- .enable = octeon_irq_msi_enable_pcie,
- .disable = octeon_irq_msi_disable_pcie,
+ .irq_enable = octeon_irq_msi_enable_pcie,
+ .irq_disable = octeon_irq_msi_disable_pcie,
};
-static void octeon_irq_msi_enable_pci(unsigned int irq)
+static void octeon_irq_msi_enable_pci(struct irq_data *data)
{
/*
* Octeon PCI doesn't have the ability to mask/unmask MSI
@@ -308,15 +308,15 @@ static void octeon_irq_msi_enable_pci(unsigned int irq)
*/
}
-static void octeon_irq_msi_disable_pci(unsigned int irq)
+static void octeon_irq_msi_disable_pci(struct irq_data *data)
{
/* See comment in enable */
}
static struct irq_chip octeon_irq_chip_msi_pci = {
.name = "MSI",
- .enable = octeon_irq_msi_enable_pci,
- .disable = octeon_irq_msi_disable_pci,
+ .irq_enable = octeon_irq_msi_enable_pci,
+ .irq_disable = octeon_irq_msi_disable_pci,
};
/*
@@ -388,7 +388,7 @@ int __init octeon_msi_initialize(void)
}
for (irq = OCTEON_IRQ_MSI_BIT0; irq <= OCTEON_IRQ_MSI_LAST; irq++)
- set_irq_chip_and_handler(irq, msi, handle_simple_irq);
+ irq_set_chip_and_handler(irq, msi, handle_simple_irq);
if (octeon_has_feature(OCTEON_FEATURE_PCIE)) {
if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt0,