diff options
Diffstat (limited to 'drivers/staging/et131x/et131x.c')
| -rw-r--r-- | drivers/staging/et131x/et131x.c | 53 |
1 files changed, 13 insertions, 40 deletions
diff --git a/drivers/staging/et131x/et131x.c b/drivers/staging/et131x/et131x.c index f73e58f5ef8..ab8b29d2cb2 100644 --- a/drivers/staging/et131x/et131x.c +++ b/drivers/staging/et131x/et131x.c @@ -493,11 +493,8 @@ struct et131x_adapter { spinlock_t send_hw_lock; spinlock_t rcv_lock; - spinlock_t rcv_pend_lock; spinlock_t fbr_lock; - spinlock_t phy_lock; - /* Packet Filter and look ahead size */ u32 packet_filter; @@ -2777,10 +2774,9 @@ static void et131x_handle_recv_interrupt(struct et131x_adapter *adapter) adapter->net_stats.rx_packets++; /* Set the status on the packet, either resources or success */ - if (adapter->rx_ring.num_ready_recv < RFD_LOW_WATER_MARK) { - dev_warn(&adapter->pdev->dev, - "RFD's are running out\n"); - } + if (adapter->rx_ring.num_ready_recv < RFD_LOW_WATER_MARK) + dev_warn(&adapter->pdev->dev, "RFD's are running out\n"); + count++; } @@ -2906,8 +2902,9 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb) * number of fragments. If needed, we can call this function, * although it is less efficient. */ - if (nr_frags > 23) - return -EIO; + + /* nr_frags should be no more than 18. */ + BUILD_BUG_ON(MAX_SKB_FRAGS + 1 > 23); memset(desc, 0, sizeof(struct tx_desc) * (nr_frags + 1)); @@ -3100,11 +3097,10 @@ static int send_packet(struct sk_buff *skb, struct et131x_adapter *adapter) shbufva = (u16 *) skb->data; if ((shbufva[0] == 0xffff) && - (shbufva[1] == 0xffff) && (shbufva[2] == 0xffff)) { + (shbufva[1] == 0xffff) && (shbufva[2] == 0xffff)) tcb->flags |= FMP_DEST_BROAD; - } else if ((shbufva[0] & 0x3) == 0x0001) { + else if ((shbufva[0] & 0x3) == 0x0001) tcb->flags |= FMP_DEST_MULTI; - } } tcb->next = NULL; @@ -3605,17 +3601,10 @@ static int et131x_pci_init(struct et131x_adapter *adapter, goto err_out; } - /* Let's set up the PORT LOGIC Register. First we need to know what - * the max_payload_size is - */ - if (pcie_capability_read_word(pdev, PCI_EXP_DEVCAP, &max_payload)) { - dev_err(&pdev->dev, - "Could not read PCI config space for Max Payload Size\n"); - goto err_out; - } + /* Let's set up the PORT LOGIC Register. */ /* Program the Ack/Nak latency and replay timers */ - max_payload &= 0x07; + max_payload = pdev->pcie_mpss; if (max_payload < 2) { static const u16 acknak[2] = { 0x76, 0xD0 }; @@ -3645,8 +3634,7 @@ static int et131x_pci_init(struct et131x_adapter *adapter, } /* Change the max read size to 2k */ - if (pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL, - PCI_EXP_DEVCTL_READRQ, 0x4 << 12)) { + if (pcie_set_readrq(pdev, 2048)) { dev_err(&pdev->dev, "Couldn't change PCI config space for Max read size\n"); goto err_out; @@ -3926,9 +3914,7 @@ static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev, spin_lock_init(&adapter->tcb_ready_qlock); spin_lock_init(&adapter->send_hw_lock); spin_lock_init(&adapter->rcv_lock); - spin_lock_init(&adapter->rcv_pend_lock); spin_lock_init(&adapter->fbr_lock); - spin_lock_init(&adapter->phy_lock); adapter->registry_jumbo_packet = 1514; /* 1514-9216 */ @@ -4797,21 +4783,8 @@ static int et131x_pci_setup(struct pci_dev *pdev, pci_set_master(pdev); /* Check the DMA addressing support of this device */ - if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { - rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64)); - if (rc < 0) { - dev_err(&pdev->dev, - "Unable to obtain 64 bit DMA for consistent allocations\n"); - goto err_release_res; - } - } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { - rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); - if (rc < 0) { - dev_err(&pdev->dev, - "Unable to obtain 32 bit DMA for consistent allocations\n"); - goto err_release_res; - } - } else { + if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) && + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) { dev_err(&pdev->dev, "No usable DMA addressing method\n"); rc = -EIO; goto err_release_res; |