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2013-12-11ARM: fiq_glue: Add custom fiq return handler api.Arve Hjønnevåg
Change-Id: I5ff2764e85151ca0a88576542fda07c2d33dd065 Signed-off-by: Arve Hjønnevåg <arve@android.com>
2013-07-01ARM: fiq_debugger: Update tty code for 3.9Arve Hjønnevåg
Signed-off-by: Arve Hjønnevåg <arve@android.com>
2013-07-01ARM: fiq_debugger: Use kmsg_dumper to dump kernel logsArve Hjønnevåg
Signed-off-by: Arve Hjønnevåg <arve@android.com>
2013-07-01ARM: fiq_debugger: Fix to compile on 3.7Arve Hjønnevåg
Use for_each_irq_desc in arch/arm/common/fiq_debugger.c Signed-off-by: Arve Hjønnevåg <arve@android.com>
2013-07-01ARM: fiq_debugger: fix uninitialised spin_lock.Mars
Backtrace: [<c0045ea0>] (dump_backtrace+0x0/0x10c) from [<c0575c60>] (dump_stack+0x1) r6:c07a489c r5:c0c9b9dc r4:00000002 r3:271aed3b [<c0575c48>] (dump_stack+0x0/0x1c) from [<c00b1b00>] (__lock_acquire+0x93) [<c00b11c8>] (__lock_acquire+0x0/0xad4) from [<c00b219c>] (lock_acquire+0) [<c00b210c>] (lock_acquire+0x0/0xa4) from [<c057e544>] (_raw_spin_lock_ir) [<c057e4f8>] (_raw_spin_lock_irq+0x0/0x5c) from [<c005297c>] (fiq_tty_wri) r5:e30f0000 r4:e36f0c00 [<c005293c>] (fiq_tty_write+0x0/0x80) from [<c023168c>] (n_tty_write+0x18) r8:e370fc40 r7:e378a000 r6:e3572d1c r5:e36f0c00 r4:00000002 r3:c005293c [<c0231500>] (n_tty_write+0x0/0x440) from [<c022d4a4>] (tty_write+0x100/0) [<c022d3a4>] (tty_write+0x0/0x2a8) from [<c0100b80>] (vfs_write+0xa4/0x14) [<c0100adc>] (vfs_write+0x0/0x148) from [<c0100cdc>] (sys_write+0x40/0x78) r8:00000002 r7:4076d2c4 r6:e370fc40 r5:00000000 r4:00000000 [<c0100c9c>] (sys_write+0x0/0x78) from [<c0041740>] (ret_fast_syscall+0x0) r8:c0041908 r7:00000004 r6:00000002 r5:00000000 r4:4007cbe0 [ccross: moved spin_lock_init into existing #ifdef] Change-Id: If400d084eb20433c126ea1dd027a6be7f2ebb1f6 Signed-off-by: Mars <caoziqiang@meizu.com> Signed-off-by: Colin Cross <ccross@android.com>
2013-07-01ARM: fiq_debugger: lock between tty and console writesColin Cross
debug_console_write calls debug_uart_flush, which will usually wait until the serial port fifo empties. If another thread is continuously calling fiq_tty_write, the fifo will constantly be refilled and debug_uart_flush might never return. Add a spinlock that is locked in debug_console_write and fiq_tty_write to ensure they can't run at the same time. This has an extra advantage of preventing lines from the console and tty from being mixed together. Also reduce the size returned by fiq_tty_write_room to keep the time spent with the spinlock held to a reasonable value. In addition, make sure fiq context can't loop forever by never calling debug_uart_flush when the console is enabled. Change-Id: I5712b01f740ca0c84f680d2032c9fa16b7656939 Signed-off-by: Colin Cross <ccross@android.com>
2013-07-01ARM: fiq_debugger: add process context reboot commandColin Cross
kernel_restart cannot be called from interrupt context. Add support for commands called from a work function, and implement the "reboot" command there. Also rename the existing irq-mode command to "reset" and change it to use machine_restart instead of kernel_restart. Change-Id: I3c423147c01db03d89e95a5b99096ca89462079f Signed-off-by: Colin Cross <ccross@android.com>
2013-07-01ARM: fiq_debugger: fix multiple consoles and make it a preferred consoleColin Cross
Fix setting up consoles on multiple fiq debugger devices by splitting the tty driver init into the initcall, and initializing the single tty device during probe. Has the side effect of moving the tty device node to /dev/ttyFIQx, where x is the platform device id, which should normally match the serial port. To avoid having to pass a different console=/dev/ttyFIQx for every device, make the fiq debugger a preferred console that will be used by default if no console was passed on the command line. Change-Id: I6cc2670628a41e84615859bc96adba189966d647 Signed-off-by: Colin Cross <ccross@android.com>
2013-07-01ARM: fiq_debugger: add support for kgdbColin Cross
Adds polling tty ops to the fiq debugger console tty, which allows kgdb to run against an fiq debugger console. Add a check in do_sysrq to prevent enabling kgdb from the fiq debugger unless a flag (writable only by root) has been set. This should make it safe to enable KGDB on a production device. Also add a shortcut to enable the console and kgdb together, to allow kgdb to be enabled when the shell on the console is not responding. Change-Id: Ifc65239ca96c9887431a6a36b9b44a539002f544 Signed-off-by: Colin Cross <ccross@android.com>
2013-07-01ARM: fiq_debugger: add debug_putcColin Cross
Convert all the calls to state->pdata->uart_putc to a debug_putc helper. Change-Id: Idc007bd170ff1b51d0325e238105ae0c86d23777 Signed-off-by: Colin Cross <ccross@android.com>
2013-07-01ARM: fiq_debugger: add support for reboot commandsColin Cross
Pass the rest of the reboot command to kernel_restart to allow reboot bootloader to work from FIQ debugger. Change-Id: I4e7b366a69268dda17ffcf4c84f2373d15cb1271 Signed-off-by: Colin Cross <ccross@android.com>
2013-07-01ARM: fiq_debugger: fix compiling for v3.3Colin Cross
Call kernel_restart instead of arch_reset, the ARM reset handling has changed. Remove localtimer irq printing, they now show up in the regular irq stats. Change-Id: I523da343b292c5711f3e1cbfd766d32eea2da84e Signed-off-by: Colin Cross <ccross@android.com>
2013-07-01ARM: Add generic fiq serial debuggerIliyan Malchev
Change-Id: Ibb536c88f0dbaf4766d0599296907e35e42cbfd6 Signed-off-by: Iliyan Malchev <malchev@google.com> Signed-off-by: Arve Hjønnevåg <arve@android.com>
2013-07-01ARM: Add fiq_glueArve Hjønnevåg
Change-Id: I27d2554e07d9de204e0a06696d38db51608d9f6b Signed-off-by: Arve Hjønnevåg <arve@android.com> Signed-off-by: Colin Cross <ccross@android.com>
2013-05-15Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds
Pull ARM fixes from Russell King: "A small number of fixes for stuff from the last merge window, and in one case (IRQ time accounting) the previous merge window." * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7720/1: ARM v6/v7 cmpxchg64 shouldn't clear upper 32 bits of the old/new value ARM: 7715/1: MCPM: adapt to GIC changes after upstream merge ARM: 7714/1: mmc: mmci: Ensure return value of regulator_enable() is checked ARM: 7712/1: Remove trailing whitespace in arch/arm/Makefile ARM: 7711/1: dove: fix Dove cpu type from V7 to PJ4 ARM: finally enable IRQ time accounting config
2013-05-10ARM: 7715/1: MCPM: adapt to GIC changes after upstream mergeNicolas Pitre
Since commit c0114709ed85 ("irqchip: gic: Perform the gic_secondary_init() call via CPU notifier") it is no longer required nor possible to call gic_secondary_init() from platform code. Signed-off-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-05-07Merge tag 'cleanup-for-linus-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late cleanups from Arnd Bergmann: "These are cleanups and smaller changes that either depend on earlier feature branches or came in late during the development cycle. We normally try to get all cleanups early, so these are the exceptions: - A follow-up on the clocksource reworks, hopefully the last time we need to merge clocksource subsystem changes through arm-soc. A first set of patches was part of the original 3.10 arm-soc cleanup series because of interdependencies with timer drivers now moved out of arch/arm. - Migrating the SPEAr13xx platform away from using auxdata for DMA channel descriptions towards using information in device tree, based on the earlier SPEAr multiplatform series - A few follow-ups on the Atmel SAMA5 support and other changes for Atmel at91 based on the larger at91 reworks. - Moving the armada irqchip implementation to drivers/irqchip - Several OMAP cleanups following up on the larger series already merged in 3.10." * tag 'cleanup-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits) ARM: OMAP4: change the device names in usb_bind_phy ARM: OMAP2+: Fix mismerge for timer.c between ff931c82 and da4a686a ARM: SPEAr: conditionalize SMP code ARM: arch_timer: Silence debug preempt warnings ARM: OMAP: remove unused variable serial: amba-pl011: fix !CONFIG_DMA_ENGINE case ata: arasan: remove the need for platform_data ARM: at91/sama5d34ek.dts: remove not needed compatibility string ARM: at91: dts: add MCI DMA support ARM: at91: dts: add i2c dma support ARM: at91: dts: set #dma-cells to the correct value ARM: at91: suspend both memory controllers on at91sam9263 irqchip: armada-370-xp: slightly cleanup irq controller driver irqchip: armada-370-xp: move IRQ handler to avoid forward declaration irqchip: move IRQ driver for Armada 370/XP ARM: mvebu: move L2 cache initialization in init_early() devtree: add binding documentation for sp804 ARM: integrator-cp: convert use CLKSRC_OF for timer init ARM: versatile: use OF init for sp804 timer ARM: versatile: add versatile dtbs to dtbs target ...
2013-05-04Merge tag 'firmware-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM platform specific firmware interfaces from Olof Johansson: "Two platforms, bcm and exynos have their own firmware interfaces using the "secure monitor call", this adds support for those. We had originally planned to have a third set of patches in here, which would extend support for the existing generic "psci" call that is used on multiple platforms as well as Xen and KVM guests, but that ended up getting dropped because the patches were not ready in time." * tag 'firmware-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: bcm: mark bcm_kona_smc_init as __init ARM: bcm281xx: Add DT support for SMC handler ARM: bcm281xx: Add L2 cache enable code ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up ARM: EXYNOS: Add IO mapping for non-secure SYSRAM. ARM: EXYNOS: Add support for Exynos secure firmware ARM: EXYNOS: Add support for secure monitor calls ARM: Add interface for registering and calling firmware-specific operations
2013-05-02ARM: 7709/1: mcpm: Add explicit AFLAGS to support v6/v7 multiplatform kernelsDave Martin
The full mcpm layer is not likely to be relevant to v6 based platforms, so a multiplatform kernel won't use that code if booted on v6 hardware. This patch modifies the AFLAGS for affected mcpm .S files to specify armv7-a explicitly for that code. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-04-24ARM: mcpm: provide an interface to set the SMP ops at run timeNicolas Pitre
This is cleaner than exporting the mcpm_smp_ops structure. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Jon Medhurst <tixy@linaro.org>
2013-04-24ARM: mcpm: generic SMP secondary bringup and hotplug supportNicolas Pitre
Now that the cluster power API is in place, we can use it for SMP secondary bringup and CPU hotplug in a generic fashion. Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24ARM: mcpm_head.S: vlock-based first man electionDave Martin
Instead of requiring the first man to be elected in advance (which can be suboptimal in some situations), this patch uses a per- cluster mutex to co-ordinate selection of the first man. This should also make it more feasible to reuse this code path for asynchronous cluster resume (as in CPUidle scenarios). We must ensure that the vlock data doesn't share a cacheline with anything else, or dirty cache eviction could corrupt it. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24ARM: mcpm: Add baremetal voting mutexesDave Martin
This patch adds a simple low-level voting mutex implementation to be used to arbitrate during first man selection when no load/store exclusive instructions are usable. For want of a better name, these are called "vlocks". (I was tempted to call them ballot locks, but "block" is way too confusing an abbreviation...) There is no function to wait for the lock to be released, and no vlock_lock() function since we don't need these at the moment. These could straightforwardly be added if vlocks get used for other purposes. For architectural correctness even Strongly-Ordered memory accesses require barriers in order to guarantee that multiple CPUs have a coherent view of the ordering of memory accesses. Whether or not this matters depends on hardware implementation details of the memory system. Since the purpose of this code is to provide a clean, generic locking mechanism with no platform-specific dependencies the barriers should be present to avoid unpleasant surprises on future platforms. Note: * When taking the lock, we don't care about implicit background memory operations and other signalling which may be pending, because those are not part of the critical section anyway. A DMB is sufficient to ensure correctly observed ordering if the explicit memory accesses in vlock_trylock. * No barrier is required after checking the election result, because the result is determined by the store to VLOCK_OWNER_OFFSET and is already globally observed due to the barriers in voting_end. This means that global agreement on the winner is guaranteed, even before the winner is known locally. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24ARM: mcpm: introduce helpers for platform coherency exit/setupDave Martin
This provides helper methods to coordinate between CPUs coming down and CPUs going up, as well as documentation on the used algorithms, so that cluster teardown and setup operations are not done for a cluster simultaneously. For use in the power_down() implementation: * __mcpm_cpu_going_down(unsigned int cluster, unsigned int cpu) * __mcpm_outbound_enter_critical(unsigned int cluster) * __mcpm_outbound_leave_critical(unsigned int cluster) * __mcpm_cpu_down(unsigned int cluster, unsigned int cpu) The power_up_setup() helper should do platform-specific setup in preparation for turning the CPU on, such as invalidating local caches or entering coherency. It must be assembler for now, since it must run before the MMU can be switched on. It is passed the affinity level for which initialization should be performed. Because the mcpm_sync_struct content is looked-up and modified with the cache enabled or disabled depending on the code path, it is crucial to always ensure proper cache maintenance to update main memory right away. The sync_cache_*() helpers are used to that end. Also, in order to prevent a cached writer from interfering with an adjacent non-cached writer, we ensure each state variable is located to a separate cache line. Thanks to Nicolas Pitre and Achin Gupta for the help with this patch. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24ARM: mcpm: introduce the CPU/cluster power APINicolas Pitre
This is the basic API used to handle the powering up/down of individual CPUs in a (multi-)cluster system. The platform specific backend implementation has the responsibility to also handle the cluster level power as well when the first/last CPU in a cluster is brought up/down. Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-24ARM: multi-cluster PM: secondary kernel entry codeNicolas Pitre
CPUs in cluster based systems, such as big.LITTLE, have special needs when entering the kernel due to a hotplug event, or when resuming from a deep sleep mode. This is vectorized so multiple CPUs can enter the kernel in parallel without serialization. The mcpm prefix stands for "multi cluster power management", however this is usable on single cluster systems as well. Only the basic structure is introduced here. This will be extended with later patches. In order not to complexify things more than they currently have to, the planned work to make runtime adjusted MPIDR based indexing and dynamic memory allocation for cluster states is postponed to a later cycle. The MAX_NR_CLUSTERS and MAX_CPUS_PER_CLUSTER static definitions should be sufficient for those systems expected to be available in the near future. Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Will Deacon <will.deacon@arm.com>
2013-04-11ARM: integrator-cp: convert use CLKSRC_OF for timer initRob Herring
Move the integrator-cp timer init to timer-sp.c and use CLKSRC_OF. There is no reason to use the aliases, so drop them from the init code. The integrator-cp timers are mistakenly called sp804 timers in the dts, but in fact they are not sp804 dual timers, but single timers with the same programming model. Fix the dts to reflect this. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-11ARM: timer-sp: convert to use CLKSRC_OF initRob Herring
This adds CLKSRC_OF based init for sp804 timer. The clock initialization is refactored to support retrieving the clock(s) from the DT. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-04-09ARM: Add interface for registering and calling firmware-specific operationsTomasz Figa
Some boards are running with secure firmware running in TrustZone secure world, which changes the way some things have to be initialized. This patch adds an interface for platforms to specify available firmware operations and call them. A wrapper macro, call_firmware_op(), checks if the operation is provided and calls it if so, otherwise returns -ENOSYS to allow fallback to legacy operation.. By default no operations are provided. Example of use: In code using firmware ops: __raw_writel(virt_to_phys(exynos4_secondary_startup), CPU1_BOOT_REG); /* Call Exynos specific smc call */ if (call_firmware_op(cpu_boot, cpu) == -ENOSYS) cpu_boot_legacy(...); /* Try legacy way */ gic_raise_softirq(cpumask_of(cpu), 1); In board-/platform-specific code: static int platformX_do_idle(void) { /* tell platformX firmware to enter idle */ return 0; } static int platformX_cpu_boot(int i) { /* tell platformX firmware to boot CPU i */ return 0; } static const struct firmware_ops platformX_firmware_ops = { .do_idle = exynos_do_idle, .cpu_boot = exynos_cpu_boot, /* other operations not available on platformX */ }; static void __init board_init_early(void) { register_firmware_ops(&platformX_firmware_ops); } Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-01-12irqchip: Move ARM VIC to drivers/irqchipRob Herring
Now that we have drivers/irqchip, move VIC irqchip to drivers/irqchip. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-01-12ARM: remove mach .handle_irq for VIC usersRob Herring
Now that the VIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Move vic_handle_irq to avoid a forward declaration. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Hubert Feurstein <hubert.feurstein@contec.at> Cc: Alessandro Rubini <rubini@unipv.it> Cc: STEricsson <STEricsson_nomadik_linux@list.st.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-01-12ARM: VIC: set handle_arch_irq in VIC initializationRob Herring
Set handle_arch_irq to vic_handle_irq. Only the first VIC initialized can setup the handler. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Olof Johansson <olof@lixom.net>
2013-01-12ARM: VIC: shrink down vic.hRob Herring
Move all register defines except VIC_INT_ENABLE and VIC_INT_ENABLE_CLEAR which are used by Samsung. With multi irq handler, vic.h is not included in assembly any more, so we can remove the assembly ifdefs. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Olof Johansson <olof@lixom.net>
2013-01-12irqchip: Move ARM GIC to drivers/irqchipRob Herring
Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This is necessary to share the GIC with arm and arm64. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de>
2013-01-12ARM: remove mach .handle_irq for GIC usersRob Herring
Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-01-10ARM: GIC: set handle_arch_irq in GIC initializationRob Herring
Set handle_arch_irq to gic_handle_irq. Only the first GIC initialized can setup the handler. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Olof Johansson <olof@lixom.net>
2013-01-10ARM: GIC: remove direct use of gic_raise_softirqRob Herring
In preparation of moving gic code to drivers/irqchip, remove the direct platform dependencies on gic_raise_softirq. Move the setup of smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask function to trigger wake-up IPIs. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
2013-01-09Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds
Pull ARM fixes from Russell King. * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM ARM: 7611/1: VIC: fix bug in VIC irqdomain code ARM: 7610/1: versatile: bump IRQ numbers ARM: 7609/1: disable errata work-arounds which access secure registers ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier
2013-01-03ARM: drivers: remove __dev* attributes.Greg Kroah-Hartman
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-02ARM: 7611/1: VIC: fix bug in VIC irqdomain codeLinus Walleij
The VIC irqdomain code added in commit 07c9249f1fa90cc8189bed44c0bcece664596a72 "ARM: 7554/1: VIC: use irq_domain_add_simple()" Had two bugs: 1) It didn't call irq_create_mapping() once on each valid irq source in the slowpath when registering the controller. 2) It passed a -1 as IRQ offset for the DT case, whereas 0 should be passed as invalid IRQ instead. Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-12-11Merge branch 'devel-stable' into for-linusRussell King
2012-12-11Merge branches 'cache-l2x0', 'fixes', 'hdrs', 'misc', 'mmci', 'vic' and ↵Russell King
'warnings' into for-next
2012-11-28ARM: 7586/1: sp804: set cpumask to cpu_possible_mask for clock event deviceWill Deacon
The SP804 driver statically initialises the cpumask of the clock event device to be cpu_all_mask, which is derived from the compile-time constant NR_CPUS. This breaks SMP_ON_UP systems where the interrupt controller handling the sp804 doesn't have the irq_set_affinity callback on the irq_chip, because the common timer code fails to identify the device as cpu-local and ends up treating it as a broadcast device instead. This patch fixes the problem by using cpu_possible_mask at runtime, which will correctly represent the possible CPUs when SMP_ON_UP is being used. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-11-19ARM: gic: use a private mapping for CPU target interfacesNicolas Pitre
The GIC interface numbering does not necessarily follow the logical CPU numbering, especially for complex topologies such as multi-cluster systems. Fortunately we can easily probe the GIC to create a mapping as the Interrupt Processor Targets Registers for the first 32 interrupts are read-only, and each field returns a value that always corresponds to the processor reading the register. Initially all mappings target all CPUs in case an IPI is required to boot secondary CPUs. It is refined as those CPUs discover what their actual mapping is. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com>
2012-11-08ARM: vic: fix build warning caused by previous commitRussell King
07c9249f1f (ARM: 7554/1: VIC: use irq_domain_add_simple()) removed the use of 'irq_base' but did not remove the variable itself, which causes: arch/arm/common/vic.c: In function 'vic_of_init': arch/arm/common/vic.c:410:6: warning: unused variable 'irq_base' Remove this now unused variable. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-18ARM: 7554/1: VIC: use irq_domain_add_simple()Linus Walleij
Instead of allocating descriptors on-the-fly for the device tree initialization case, use irq_domain_add_simple() which will take care of this if you pass negative as the first_irq. Alter the signature of __vic_init() to pass the first_irq as signed so this works as expected. Switching the VIC to use irq_domain_add_simple() also has the upside of displaying the same WARNING when you boot with pre-allocated descriptors on systems using SPARSE_IRQ but yet not using device tree. Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-13ARM: config: sort select statements alphanumericallyRussell King
As suggested by Andrew Morton: This is a pet peeve of mine. Any time there's a long list of items (header file inclusions, kconfig entries, array initalisers, etc) and someone wants to add a new item, they *always* go and stick it at the end of the list. Guys, don't do this. Either put the new item into a randomly-chosen position or, probably better, alphanumerically sort the list. lets sort all our select statements alphanumerically. This commit was created by the following perl: while (<>) { while (/\\\s*$/) { $_ .= <>; } undef %selects if /^\s*config\s+/; if (/^\s+select\s+(\w+).*/) { if (defined($selects{$1})) { if ($selects{$1} eq $_) { print STDERR "Warning: removing duplicated $1 entry\n"; } else { print STDERR "Error: $1 differently selected\n". "\tOld: $selects{$1}\n". "\tNew: $_\n"; exit 1; } } $selects{$1} = $_; next; } if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or /^endif/ or /^endchoice/)) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } undef %selects; } print; } if (%selects) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } } It found two duplicates: Warning: removing duplicated S5P_SETUP_MIPIPHY entry Warning: removing duplicated HARDIRQS_SW_RESEND entry and they are identical duplicates, hence the shrinkage in the diffstat of two lines. We have four testers reporting success of this change (Tony, Stephen, Linus and Sekhar.) Acked-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-09ARM: pxa: armcore: fix PCI PIO warningsArnd Bergmann
The it8152 PCI host used on the pxa/cm_x2xx machines uses the old-style I/O window registration. This should eventually get converted to pci_ioremap_io() but for now, let's cast the IT8152_IO_BASE constant to an integer type to get rid of the warnings. Without this patch, building cm_x2xx_defconfig results in: arch/arm/common/it8152.c: In function 'it8152_pci_setup': arch/arm/common/it8152.c:287:18: warning: assignment makes integer from pointer without a cast [enabled by default] arch/arm/common/it8152.c:288:16: warning: assignment makes integer from pointer without a cast [enabled by default] arch/arm/common/it8152.c:291:17: warning: assignment makes integer from pointer without a cast [enabled by default] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Mike Rapoport <mike@compulab.co.il> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Eric Miao <eric.y.miao@gmail.com>
2012-07-30ARM: dma-mapping: add support for dma_get_sgtable()Marek Szyprowski
This patch adds support for dma_get_sgtable() function which is required to let drivers to share the buffers allocated by DMA-mapping subsystem. Generic implementation based on virt_to_page() is not suitable for ARM dma-mapping subsystem. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
2012-06-13ARM: dma-mapping: fix debug messages in dmabounce codeMarek Szyprowski
This patch fixes the usage of uninitialized variables in dmabounce code intoduced by commit a227fb92 ('ARM: dma-mapping: remove offset parameter to prepare for generic dma_ops'): arch/arm/common/dmabounce.c: In function ‘dmabounce_sync_for_device’: arch/arm/common/dmabounce.c:409: warning: ‘off’ may be used uninitialized in this function arch/arm/common/dmabounce.c:407: note: ‘off’ was declared here arch/arm/common/dmabounce.c: In function ‘dmabounce_sync_for_cpu’: arch/arm/common/dmabounce.c:369: warning: ‘off’ may be used uninitialized in this function arch/arm/common/dmabounce.c:367: note: ‘off’ was declared here Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>