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2012-12-20UAPI: (Scripted) Disintegrate arch/score/include/asmDavid Howells
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com> Acked-by: Lennox Wu <lennox.wu@gmail.com> Acked-by: Liqin Chen <liqin299@gmail.com>
2012-12-19Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparcLinus Torvalds
Pull sparc fixes from David Miller: "Please pull to get these sparc AES/DES/CAMELLIA crypto bug fixes as well as an addition of a pte_accessible() define for sparc64 and a hugetlb fix from Dave Kleikamp." * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in CAMELLIA code. sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in DES code. sparc64: Fix ECB looping constructs in AES code. sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in AES code. sparc64: Fix AES ctr mode block size. sparc64: Fix unrolled AES 256-bit key loops. sparc64: Define pte_accessible() sparc: huge_ptep_set_* functions need to call set_huge_pte_at()
2012-12-19sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in CAMELLIA code.David S. Miller
We use the FPU and therefore cannot sleep during the crypto loops. Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in DES code.David S. Miller
We use the FPU and therefore cannot sleep during the crypto loops. Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19sparc64: Fix ECB looping constructs in AES code.David S. Miller
Things works better when you increment the source buffer pointer properly. Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in AES code.David S. Miller
We use the FPU and therefore cannot sleep during the crypto loops. Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19sparc64: Fix AES ctr mode block size.David S. Miller
Like the generic versions, we need to support a block size of '1' for CTR mode AES. This was discovered thanks to all of the new test cases added by Jussi Kivilinna. Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19sparc64: Fix unrolled AES 256-bit key loops.David S. Miller
The basic scheme of the block mode assembler is that we start by enabling the FPU, loading the key into the floating point registers, then iterate calling the encrypt/decrypt routine for each block. For the 256-bit key cases, we run short on registers in the unrolled loops. So the {ENCRYPT,DECRYPT}_256_2() macros reload the key registers that get clobbered. The unrolled macros, {ENCRYPT,DECRYPT}_256(), are not mindful of this. So if we have a mix of multi-block and single-block calls, the single-block unrolled 256-bit encrypt/decrypt can run with some of the key registers clobbered. Handle this by always explicitly loading those registers before using the non-unrolled 256-bit macro. This was discovered thanks to all of the new test cases added by Jussi Kivilinna. Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19Merge tag 'xtensa-20121218' of git://github.com/czankel/xtensa-linuxLinus Torvalds
Pull Xtensa patchset from Chris Zankel: "This contains support of device trees, many fixes, and code clean-ups" * tag 'xtensa-20121218' of git://github.com/czankel/xtensa-linux: (33 commits) xtensa: don't try to build DTB when OF is disabled xtensa: set the correct ethernet address for xtfpga xtensa: clean up files to make them code-style compliant xtensa: provide endianness macro for sparse xtensa: fix RASID SR initialization xtensa: initialize CPENABLE SR when core has one xtensa: reset all timers on initialization Use for_each_compatible_node() macro. xtensa: add XTFPGA DTS xtensa: add support for the XTFPGA boards xtensa: add device trees support xtensa: add IRQ domains support xtensa: add U-Boot image support (uImage). xtensa: clean up boot make rules xtensa: fix mb and wmb definitions xtensa: add s32c1i-based spinlock implementations xtensa: add s32c1i-based bitops implementations xtensa: add s32c1i-based atomic ops implementations xtensa: add s32c1i sanity check xtensa: add trap_set_handler function ...
2012-12-19Merge branch 'x86/nuke386' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull one final 386 removal patch from Peter Anvin. IRQ 13 FPU error handling is gone. That was not one of the proudest moments in PC history. * 'x86/nuke386' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, 386 removal: Remove support for IRQ 13 FPU error reporting
2012-12-19Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtdLinus Torvalds
Pull MTD updates from David Woodhouse: - Various cleanups especially in NAND tests - Add support for NAND flash on BCMA bus - DT support for sh_flctl and denali NAND drivers - Kill obsolete/superceded drivers (fortunet, nomadik_nand) - Fix JFFS2 locking bug in ENOMEM failure path - New SPI flash chips, as usual - Support writing in 'reliable mode' for DiskOnChip G4 - Debugfs support in nandsim * tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits) mtd: nand: typo in nand_id_has_period() comments mtd: nand/gpio: use io{read,write}*_rep accessors mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited. mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems mtd: nand/docg4: fix and improve read of factory bbt mtd: nand/docg4: reserve bb marker area in ecclayout mtd: nand/docg4: add support for writing in reliable mode mtd: mxc_nand: reorder part_probes to let cmdline override other sources mtd: mxc_nand: fix unbalanced clk_disable() in error path mtd: nandsim: Introduce debugfs infrastructure mtd: physmap_of: error checking to prevent a NULL pointer dereference mtg: docg3: potential divide by zero in doc_write_oob() mtd: bcm47xxnflash: writing support mtd: tests/read: initialize buffer for whole next page mtd: at91: atmel_nand: return bit flips for the PMECC read_page() mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c mtd: nand: onfi need to be probed in 8 bits mode mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width mtd: nand: print flash size during detection mted: nand_wait_ready timeout fix ...
2012-12-19Merge tag 'for-v3.8-part2' of git://git.infradead.org/battery-2.6Linus Torvalds
Pull battery update, part 2, from Anton Vorontsov: "These are left overs that I didn't have time to review/apply before the merge window opened. I didn't want to "spoil" the first pull request with these late patches, so they were not included: - A small patch for the RX51 OMAP board (Nokia N900 phone), the patch creates a battery monitor device instance, so that it can be probed. It was acked by the OMAP maintainer; - A couple of late bug fixes for the charger-manager: corrects corner cases for the battery full handling." * tag 'for-v3.8-part2' of git://git.infradead.org/battery-2.6: charger-manager: Fix bug when check dropped voltage after fullbatt event charger-manager: Fix bug related to checking fully charged state of battery ARM: OMAP: rx51: Register platform device for rx51_battery
2012-12-19Merge tag 'modules-next-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux Pull module update from Rusty Russell: "Nothing all that exciting; a new module-from-fd syscall for those who want to verify the source of the module (ChromeOS) and/or use standard IMA on it or other security hooks." * tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: MODSIGN: Fix kbuild output when using default extra_certificates MODSIGN: Avoid using .incbin in C source modules: don't hand 0 to vmalloc. module: Remove a extra null character at the top of module->strtab. ASN.1: Use the ASN1_LONG_TAG and ASN1_INDEFINITE_LENGTH constants ASN.1: Define indefinite length marker constant moduleparam: use __UNIQUE_ID() __UNIQUE_ID() MODSIGN: Add modules_sign make target powerpc: add finit_module syscall. ima: support new kernel module syscall add finit_module syscall to asm-generic ARM: add finit_module syscall to ARM security: introduce kernel_module_from_file hook module: add flags arg to sys_finit_module() module: add syscall to load module from fd
2012-12-19Merge tag 'byteswap-for-linus-20121219' of ↵Linus Torvalds
git://git.infradead.org/users/dwmw2/byteswap Pull preparatory gcc intrisics bswap patch from David Woodhouse: "This single patch is effectively a no-op for now. It enables architectures to opt in to using GCC's __builtin_bswapXX() intrinsics for byteswapping, and if we merge this now then the architecture maintainers can enable it for their arch during the next cycle without dependency issues. It's worth making it a par-arch opt-in, because although in *theory* the compiler should never do worse than hand-coded assembler (and of course it also ought to do a lot better on platforms like Atom and PowerPC which have load-and-swap or store-and-swap instructions), that isn't always the case. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46453 for example." * tag 'byteswap-for-linus-20121219' of git://git.infradead.org/users/dwmw2/byteswap: byteorder: allow arch to opt to use GCC intrinsics for byteswapping
2012-12-18xtensa: don't try to build DTB when OF is disabledMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: set the correct ethernet address for xtfpgaChris Zankel
The last byte of the mac address is determined by a DIP switch, so update the OF property with that address. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: clean up files to make them code-style compliantChris Zankel
Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: provide endianness macro for sparseMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: fix RASID SR initializationMax Filippov
set_rasid_register accepts new RASID SR value, but ASID_USER_FIRST is ASID value for the ring 1; RASID value is made by ASID_INSERT macro. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: initialize CPENABLE SR when core has oneMax Filippov
XCHAL_CP_NUM is defined in variant/tie.h and it is not included by head.S, leaving CPENABLE register uninitialised. XCHAL_HAVE_CP is defined in variant/core.h to 1 when core has CPENABLE SR. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: reset all timers on initializationMax Filippov
There are XCHAL_NUM_TIMERS, reset them all. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18Use for_each_compatible_node() macro.Wei Yongjun
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add XTFPGA DTSMax Filippov
Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60 and for ML605. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add support for the XTFPGA boardsMax Filippov
The Avnet LX60/LX110/LX200 board is an FPGA board that can be configured with an Xtensa processor and an OpenCores Ethernet device. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add device trees supportMax Filippov
Device trees allow specification of hardware topology and device parameters at runtime instead of hard-coding them in platform setup code. This allows running single binary kernel on a range of compatible boards. New boot parameters tag BP_TAG_FDT is allocated and a pointer to flat device tree is passed in it. Note that current interrupt mapping scheme uses single cell for interrupt identification. That means that IRQ numbers used in DTS must be CPU internal IRQ numbers, not external. It is possible to extend interrupt identification to two cells, and use second cell to tell external IRQ numbers form internal. That would allow to use single DTS on multiple boards with different mapping of external IRQ numbers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add IRQ domains supportMax Filippov
IRQ domains provide a mechanism for conversion of linux IRQ numbers to hardware IRQ numbers and vice versus. It is used by OpenFirmware for linking device tree objects to their respective interrupt controllers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add U-Boot image support (uImage).Max Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: clean up boot make rulesMax Filippov
- remove duplicate rules for binary and packed image - use predefined macros for ld/objcopy/gzip - remove build-id section from bootable elf image Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: fix mb and wmb definitionsMax Filippov
Define mb and wmb as memw to force memory barrier. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add s32c1i-based spinlock implementationsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add s32c1i-based bitops implementationsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add s32c1i-based atomic ops implementationsMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add s32c1i sanity checkMax Filippov
Add a brief sanity test of S32C1I functionality. This instruction is needed by the kernel and userland as part of the base ABI (including GCC atomic builtins, certain threading packages, future atomic support in the C++ standard, etc). However, correct operation of this instruction requires some cooperation by hardware external to the processor (such as bus bridge, bus fabric, or memory controller). Minimally exercising this mechanism and reporting explicit status early in the boot process is helpful to chip vendors using the Linux kernel as a benchmark of correctness of hardware. As it turns out, S32C1I is not exercised by the kernel and by uClibc based userland as of early June 2008. This is expected to change soon as both incorporate more recent open source developments. Signed-off-by: Marc Gauthier <marc@tensilica.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add trap_set_handler functionMax Filippov
trap_set_handler sets new C-handler in the exception table and returns previous handler. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: initialize atomctl SRMax Filippov
In order to use S32C1I instruction on cores with ATOMCTL SR the register must be properly initialized. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: save and restore scompare1 SR on kernel entryMax Filippov
Although scompare1 may be saved/restored by xchal_ncp_{load,store} macros, explicit save/restore of registers manipulated by the kernel itself is considered more correct. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: display s32c1i feature flag in cpuinfoMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: fix CPU cache flags formattingMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: properly fix missing compiler barrier in simcallMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: fix build warning for arch/xtensa/mm/tlb.cMax Filippov
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: provide DMA_ERROR_CODE definitionMax Filippov
This fixes the following allmodconfig build error: drivers/uio/uio_dmem_genirq.c:95:18: error: 'DMA_ERROR_CODE' undeclared (first use in this function) drivers/uio/uio_dmem_genirq.c:238:18: error: 'DMA_ERROR_CODE' undeclared (first use in this function) make[3]: *** [drivers/uio/uio_dmem_genirq.o] Error 1 Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: ISS: add BASE_BAUD definition to serial.hMax Filippov
This fixes the following build error in allyesconfig: drivers/tty/serial/8250/8250_early.c: In function 'parse_options': drivers/tty/serial/8250/8250_early.c:160:18: error: 'BASE_BAUD' undeclared (first use in this function) Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: provide proper assembler function boundaries with ENDPROC()Chris Zankel
Use ENDPROC() to mark the end of assembler functions. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: make DoubleExceptionVector literals fit the gapMax Filippov
Manually load references to exc_table from the explicit literal in order to fit DoubleExceptionVector.literals into the available 16-byte gap before DoubleExceptionVector.text in the absence of link time relaxation. Without this fix DoubleExceptionVector.literal section overlaps DoubleExceptionVector.text section in the linked vmlinux image. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: add config option to disable linker relaxationChris Zankel
The default linker behavior is to optimize identical literal values and remove unnecessary overhead from assembler-generated "longcall" sequences to reduce code size. Provide an option to disable this behavior to improve compile time. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa: unbalanced parenthesesNicolas Kaiser
Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18xtensa:fix the incompatible pointer type warning in time.cWanlong Gao
Fix the definition of the function ccount_read to be compatible to the member read of the structure clocksource. Signed-off-by: Wanlong Gao <wanlong.gao@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linuxLinus Torvalds
Pull i2c-embedded changes from Wolfram Sang: - CBUS driver (an I2C variant) - continued rework of the omap driver - s3c2410 gets lots of fixes and gains pinctrl support - at91 gains DMA support - the GPIO muxer gains devicetree probing - typical fixes and additions all over * 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (45 commits) i2c: omap: Remove the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE flag i2c: at91: add dma support i2c: at91: change struct members indentation i2c: at91: fix compilation warning i2c: mxs: Do not disable the I2C SMBus quick mode i2c: mxs: Handle i2c DMA failure properly i2c: s3c2410: Remove recently introduced performance overheads i2c: ocores: Move grlib set/get functions into #ifdef CONFIG_OF block i2c: s3c2410: Add fix for i2c suspend/resume i2c: s3c2410: Fix code to free gpios i2c: i2c-cbus-gpio: introduce driver i2c: ocores: Add support for the GRLIB port of the controller and use function pointers for getreg and setreg functions i2c: ocores: Add irq support for sparc i2c: omap: Move the remove constraint ARM: dts: cfa10049: Add the i2c muxer buses to the CFA-10049 i2c: s3c2410: do not special case HDMIPHY stuck bus detection i2c: s3c2410: use exponential back off while polling for bus idle i2c: s3c2410: do not generate STOP for QUIRK_HDMIPHY i2c: s3c2410: grab adapter lock while changing i2c clock i2c: s3c2410: Add support for pinctrl ...
2012-12-18sparc64: Define pte_accessible()David S. Miller
We can elide flush_tlb_*() calls when _PAGE_VALID is clear as that is the test used to determine whether or not to queue up a TLB flush in set_pte_at(). Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-18sparc: huge_ptep_set_* functions need to call set_huge_pte_at()Dave Kleikamp
Modifying the huge pte's requires that all the underlying pte's be modified. Version 2: added missing flush_tlb_page() Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: sparclinux@vger.kernel.org Signed-off-by: David S. Miller <davem@davemloft.net>
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