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path: root/drivers/acpi/acpica/hwregs.c
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2011-11-06ACPI: Fix possible recursive locking in hwregs.cRakib Mullick
Calling pm-suspend might trigger a recursive lock in it's code path. In function acpi_hw_clear_acpi_status, acpi_os_acquire_lock holds the lock acpi_gbl_hardware_lock before calling acpi_hw_register_write(), then without releasing acpi_gbl_hardware_lock, this function calls acpi_ev_walk_gpe_list, which tries to hold acpi_gbl_gpe_lock. Both acpi_gbl_hardware_lock and acpi_gbl_gpe_lock are at same lock-class and which might cause lock recursion deadlock. Following patch fixes this scenario by just releasing acpi_gbl_hardware_lock before calling acpi_ev_walk_gpe_list. Changes since v0(https://lkml.org/lkml/2011/9/21/355): - Fix changelog, thanks to Lin Ming. Changes since v1 (https://lkml.org/lkml/2011/11/3/89): - Update changelog and rename goto label, courtesy Srivatsa S. Bhat. Signed-off-by: Rakib Mullick <rakib.mullick@gmail.com> Reviewed-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Len Brown <len.brown@intel.com>
2011-01-18ACPICA: Update all ACPICA copyrights and signons to 2011Bob Moore
Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-04-20ACPICA: Standardize integer output for ACPICA warnings/errorsBob Moore
Always use 0x prefix for hex output, use %u for integer output (all integers are unsigned.) Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-01-22ACPICA: Update all ACPICA copyrights and signons to 2010Bob Moore
Add 2010 copyright to all module headers and signons, including the Linux header. This affects virtually every file in the ACPICA core subsystem, iASL compiler, and all utilities. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-08-27ACPICA: Add 64-bit support to acpi_read and acpi_writeBob Moore
Needed by drivers for new ACPi tables. Internal versions of these functions still use 32-bit max transfers, in order to minimize disruption and stack use for the standard ACPI registers (FADT-based). Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-05-27ACPICA: Fix a few warnings for gcc 3.4.4Bob Moore
Mostly for acpiexec, one in the core subsystem. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27ACPICA: Clear PM register write-only bits on readingLin Ming
Affects PM1 Control register only. When reading the register, zero the write-only bits as per the ACPI spec. ACPICA BZ 443. Lin Ming. http://www.acpica.org/bugzilla/show_bug.cgi?id=443 Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27ACPICA: New: I/O port protectionBob Moore
Protect certain I/O ports from reads/writes. Provides MS compatibility. New module, hwvalid.c Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27ACPICA: Preserve all PM control reserved and ignored bitsBob Moore
As per the ACPI specification, preserve (read/modify/write) all bits that are defined as either reserved or ignored (PM control control registers only.) Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-27ACPICA: Change handling of PM1 Status register ignored bitBob Moore
Ignored bits must be preserved according to the ACPI spec. Usually this means a read/modify/write when writing to the register. However, for status registers, writing a one means clear the event. Writing a zero means preserve the event (do not clear.) This behavior is clarified in the ACPI 4.0 spec, and the ACPICA code now simply always writes a zero to the ignored bit. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: Add function to handle PM1 control registersBob Moore
Added acpi_hw_write_pm1_control. This function writes both of the PM1 control registers (A/B). These registers are different than than the PM1 A/B status and enable registers in that different values can be written to the A/B registers. Most notably, the SLP_TYP bits can be different, as per the values returned from the _Sx predefined methods. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: For PM1B registers, do not shift value read or writtenBob Moore
The PM1B registers are mirrors of the PM1A registers with different bits actually implemented. From the ACPI specification: "Although the bits can be split between the two register blocks (each register block has a unique pointer within the FADT), the bit positions are maintained. The register block with unimplemented bits (that is, those implemented in the other register block) always returns zeros, and writes have no side effects" Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: Remove extra write for acpi_hw_clear_acpi_statusBob Moore
This function was writing an optional PM1B status register twice. The existing call to the low-level acpi_hw_register_write automatically handles a possibly split PM1 A/B register. ACPICA BZ 751. http://www.acpica.org/bugzilla/show_bug.cgi?id=751 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: Fix writes to optional PM1B registersBob Moore
On read, shift B register bits above the A bits. On write, shift B bits down to zero before writing the B register. New: acpi_hw_read_multiple, acpi_hw_write_multiple. These two functions now transparently handle the (possible) split registers for PM1 Status, Enable, and Control. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-03-26ACPICA: Split out PM1 status registers from the FADTBob Moore
Add new globals for the PM1 status registers (A/B), similar to the way the PM1 enable registers are handled. Instead of overloading the FADT Event Register blocks. This makes the code clearer and less prone to error. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-01-09ACPICA: hide private headersLen Brown
Signed-off-by: Len Brown <len.brown@intel.com>
2009-01-09ACPICA: create acpica/ directoryLen Brown
also, delete sleep/ and delete ACPI_CFLAGS from Makefile Signed-off-by: Len Brown <len.brown@intel.com>