aboutsummaryrefslogtreecommitdiff
path: root/drivers/clk/samsung/clk-exynos4.c
AgeCommit message (Collapse)Author
2013-05-29clk: samsung: Add CLK_IGNORE_UNUSED flag for the sysreg clocksSylwester Nawrocki
Currently no driver *) handles the sysreg clock, with an assumption that this clock is always left in its default state (enabled). Before commit 6e6aac7590f902d14d90bace3fd499 ARM: EXYNOS: Migrate clock support to common clock framework the sysreg clock was not even defined and hence wasn't handled explicitly in the kernel. To restore the previous behaviour disable masking the sysreg clock off in the clock core by default. *) Except the Exynos4x12 FIMC-IS driver, which will be modified to not touch the sysreg clock. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-19clk: exynos: prepare for multiplatformArnd Bergmann
The new common clock drivers for exynos are using compile time constants and soc_is_exynos* macros to provide backwards compatibility for pre-DT systems, which is not possible with multiplatform kernels. This moves all the necessary information back into platform code and removes the mach/* header inclusions. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Mike Turquette <mturquette@linaro.org>
2013-04-08clk: exynos4: export clocks required for fimc-isSylwester Nawrocki
This patch adds clock indexes for ACLK_DIV0, ACLK_DIV1, ACLK_400_MCUISP, ACLK_MCUISP_DIV0, ACLK_MCUISP_DIV1, DIVACLK_400_MCUISP and DIVACLK_200 so these clocks are available to the consumers (Exynos4x12 FIMC-IS subsystem). While at it, indentation of the mux clocks table is corrected. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add support for SoC-specific register save listTomasz Figa
This patch extends suspend/resume support for SoC-specific registers to handle differences in register sets on particular SoCs. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add missing registers to suspend save listTomasz Figa
This patch adds missing clock control registers to the list of registers that should be saved across system suspend. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Remove E4X12 prefix from SRC_DMC registerTomasz Figa
This register is present on all Exynos4 SoCs and so the prefix is misleading. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add E4210 prefix to GATE_IP_PERIR registerTomasz Figa
This definition is specific for Exynos4210 (which has another location than the same register on Exynos4x12 SoCs) and so needs appropriate prefix. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add E4210 prefix to LCD1 clock registersTomasz Figa
This patch adds E4210 prefix to all registers related to LCD1 clock domain, because they are present only on Exynos4210. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Remove SoC-specific registers from save listTomasz Figa
Current clock save list is shared for all Exynos4 SoCs, so it must contain only registers present in all supported SoCs, because accessing unavailable registers might have undefined effect. This patch removes registers specific for particular SoCs from shared save list, as they should be supported by separate SoC-specific lists. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Use SRC_MASK_PERIL{0,1} definitionsTomasz Figa
There are definitions of SRC_MASK_PERIL0 and SRC_MASK_PERIL1 registers, but they are not used for clock definitions. This patch modifies related clock definitions to use defined macros instead of numeric offsets. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Define {E,V}PLL registersTomasz Figa
This patch adds preprocessor definitions of EPLL and VPLL registers and replaces all occurences of offsets of related registers with new definitions. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add missing mout_sata on Exynos4210Tomasz Figa
This patch adds missing mout_sata that is a parent of div_sata clock. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add missing CMU_TOP and ISP clocksAndrzej Hajda
The patch adds missing clocks to TOP and ISP clock domains. It also adds clock gates for ISP sub-blocks. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add G3D clocksTomasz Figa
This patch adds clocks needed for G3D block present on Exynos 4 SoCs. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add camera related clock definitionsSylwester Nawrocki
This patch adds several gate and mux clocks related to camera and ISP blocks. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Export mout_core clock of Exynos4210Tomasz Figa
This patch enables clock lookup registration for mout_core clock used in Exynos4210 cpufreq driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Export clocks used by exynos cpufreq driversLukasz Majewski
This patch exports clocks used by Exynos cpufreq drivers to allow lookup using device tree. (Support to cpufreq drivers will be added in further patches.) Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Move dac and mixer to Exynos4210-specific clocksTomasz Figa
The sclk_dac and sclk_mixer clocks are not present on Exynos4x12. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Export sclk_pcm0Tomasz Figa
This clock is used by PCM interface 0. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add missing sclk_audio0 clockTomasz Figa
This clock is a parent of mout_spdif and sclk_pcm0. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Add missing mout_mipihsi clockTomasz Figa
This patch adds missing output of mux MIPIHSI which is needed for div_mipihsi clock. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Use mout_mpll_user_* on Exynos4x12Tomasz Figa
Many clock muxes of Exynos 4x12 uses mout_mpll_user_* clocks instead of sclk_mpll as one of their parents. This patch moves such clocks from common array into SoC-specific arrays and adjusts their parent lists respectively. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-04-04clk: exynos4: Correct sclk_mfc clock definitionSylwester Nawrocki
This clock must be exported to allow lookup using device tree. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-03-25clk: exynos4: register clocks using common clock frameworkThomas Abraham
The Exynos4 clocks are statically listed and registered using the Samsung specific common clock helper functions. Both device tree based clock lookup and clkdev based clock lookups are supported. Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>