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path: root/drivers/clk
AgeCommit message (Expand)Author
2014-01-20Merge branch 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-int...Dave Airlie
2014-01-08clk: clk-divider: fix divisor > 255 bugJames Hogan
2014-01-05Merge tag 'samsung-clk-fixes' of git://git.kernel.org/pub/scm/linux/kernel/gi...Mike Turquette
2013-12-30clk: exynos: File scope reg_save array should depend on PM_SLEEPKrzysztof Kozlowski
2013-12-30clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clockAbhilash Kesavan
2013-12-30clk: samsung: exynos5250: Add MDMA0 clocksAbhilash Kesavan
2013-12-30clk: samsung: exynos5250: Fix ACP gate register offsetAbhilash Kesavan
2013-12-30clk: exynos5250: fix sysmmu_mfc{l,r} gate clocksAndrew Bresticker
2013-12-30clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim
2013-12-16mfd: s2mps11: Fix build after regmap field rename in sec-core.cKrzysztof Kozlowski
2013-12-11clk: tegra: remove bogus PCIE_XCLKStephen Warren
2013-12-11clk: tegra: remove legacy reset APIsStephen Warren
2013-12-11clk: tegra: implement a reset driverStephen Warren
2013-11-28clk: tegra: fix __clk_lookup() return value checksWei Yongjun
2013-11-28clk: tegra: Do not print errors for clk_round_rate()Thierry Reding
2013-11-26clk: tegra: Initialize DSI low-power clocksThierry Reding
2013-11-26clk: tegra: add FUSE clock deviceAlexandre Courbot
2013-11-26clk: tegra: Properly setup PWM clock on Tegra30Thierry Reding
2013-11-26clk: tegra: Initialize secondary gr3d clock on Tegra30Thierry Reding
2013-11-26clk: tegra114: Initialize clocks needed for HDMIMikko Perttunen
2013-11-26clk: tegra124: add suspend/resume function for tegra_cpu_car_opsJoseph Lo
2013-11-26clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_opsJoseph Lo
2013-11-26clk: tegra124: Add support for Tegra124 clocksPeter De Schrijver
2013-11-26clk: tegra124: Add new peripheral clocksPeter De Schrijver
2013-11-26clk: tegra124: Add common clk IDs to clk-id.hPeter De Schrijver
2013-11-26clk: tegra: add TEGRA_PERIPH_NO_GATEPeter De Schrijver
2013-11-26clk: tegra: add locking to periph clksPeter De Schrijver
2013-11-26clk: tegra: Add periph regs bank XPeter De Schrijver
2013-11-26clk: tegra: Add support for PLLSSPeter De Schrijver
2013-11-26clk: tegra: move tegra20 to common infraPeter De Schrijver
2013-11-26clk: tegra: move tegra30 to common infraPeter De Schrijver
2013-11-26clk: tegra: introduce common gen4 super clockPeter De Schrijver
2013-11-26clk: tegra: move PMC, fixed clocks to common filesPeter De Schrijver
2013-11-26clk: tegra: move periph clocks to common filePeter De Schrijver
2013-11-26clk: tegra: move audio clk to common filePeter De Schrijver
2013-11-26clk: tegra: add clkdev registration infraPeter De Schrijver
2013-11-26clk: tegra: add common infra for DT clocksPeter De Schrijver
2013-11-26clk: tegra: add header for common tegra clock IDsPeter De Schrijver
2013-11-26clk: tegra: move fields to tegra_clk_pll_paramsPeter De Schrijver
2013-11-26clk: tegra: use pll_ref as the pll_e parentPeter De Schrijver
2013-11-26clk: tegra: move some PLLC and PLLXC init to clk-pll.cPeter De Schrijver
2013-11-26clk: tegra: Add TEGRA_PERIPH_NO_DIV flagPeter De Schrijver
2013-11-26clk: tegra: common periph_clk_enb_refcnt and clksPeter De Schrijver
2013-11-26clk: tegra: simplify periph clock dataPeter De Schrijver
2013-11-26clk: tegra: Fix clock rate computationThierry Reding
2013-11-26clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3dThierry Reding
2013-11-26clk: tegra: PLLE spread spectrum controlPeter De Schrijver
2013-11-26clk: tegra: Set the clk parent of host1x to pll_pAndrew Chew
2013-11-26clk: tegra: add TEGRA_DIVIDER_ROUND_UP for periph clksPeter De Schrijver
2013-11-25clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2Mark Zhang