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path: root/drivers/gpu/drm/i915/intel_pm.c
AgeCommit message (Expand)Author
2013-12-23Merge tag 'drm-intel-next-2013-12-13' of git://people.freedesktop.org/~danvet...Dave Airlie
2013-12-18Merge tag 'drm-intel-next-2013-11-29' of git://people.freedesktop.org/~danvet...Dave Airlie
2013-12-13drm/i915/bdw: Implement ff workaroundsBen Widawsky
2013-12-13drm/i915/bdw: Force all Data Cache Data Port access to be Non-CoherentBen Widawsky
2013-12-12drm/i915: Rework the FBC interval/stall stuff a bitVille Syrjälä
2013-12-12drm/i915: FBC_CONTROL2 is gen4 onlyVille Syrjälä
2013-12-12drm/i915: Gen2 FBC1 CFB pitch wants 32B unitsVille Syrjälä
2013-12-12drm/i915: touch VGA MSR after we enable the power wellPaulo Zanoni
2013-12-12drm/i915: extract hsw_power_well_post_{enable, disable}Paulo Zanoni
2013-12-10drm/i915: add initial Runtime PM functionsPaulo Zanoni
2013-12-10drm/i915: get a PC8 reference when enabling the power wellPaulo Zanoni
2013-12-09Merge tag 'v3.13-rc3' into drm-intel-next-queuedDaniel Vetter
2013-12-04drm/i915: Reorganize FBC function pointer initializaitionVille Syrjälä
2013-12-04drm/i915: Fix FBC1 plane checks for gen2Ville Syrjälä
2013-11-28drm/i915: add intel_display_power_enabled_sw() for use in atomic ctxImre Deak
2013-11-28drm/i915/vlv: use parallel context restore when coming out of RC6Jesse Barnes
2013-11-28drm/i915/vlv: use a lower RC6 timeout on VLVJesse Barnes
2013-11-28drm/i915/vlv: Valleyview support for forcewake Individual power wells.Deepak S
2013-11-28drm/i915: Add power well arguments to force wake routines.Deepak S
2013-11-27drm/i915: use crtc_htotal in watermark calculations to match fastboot v2Jesse Barnes
2013-11-26drm/i915: add a debugfs entry for power domain infoImre Deak
2013-11-26drm/i915: add a default always-on power wellImre Deak
2013-11-26drm/i915: don't do BDW/HSW specific powerdomains init on other platformsImre Deak
2013-11-26drm/i915: add always-on power wells instead of special casing themImre Deak
2013-11-26drm/i915: support for multiple power wellsImre Deak
2013-11-26drm/i915: add audio power domainImre Deak
2013-11-25drm/i915: Don't set the fence number in DPFC_CTL on SNBVille Syrjälä
2013-11-21drm/i915: Use plane_name() in gen7_enable_fbc()Ville Syrjälä
2013-11-20drm/i915: Fix gen3 self-refresh watermarksDaniel Vetter
2013-11-16Partially revert "drm/i915: tune the RC6 threshold for stability"Daniel Vetter
2013-11-15Merge branch 'backlight-rework' into drm-intel-next-queuedDaniel Vetter
2013-11-14drm/i915/bdw: PIPE_[BC] I[ME]R moved to powerwellBen Widawsky
2013-11-08drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPointsBen Widawsky
2013-11-08drm/i915/bdw: conservative SBE VUE cache modeBen Widawsky
2013-11-08drm/i915/bdw: Limit SDE poly depth FIFO to 2Ben Widawsky
2013-11-08drm/i915/bdw: Sampler power bypass disableBen Widawsky
2013-11-08ddrm/i915/bdw: Disable centroid pixel perf optimizationBen Widawsky
2013-11-08drm/i915/bdw: BWGTLB clock gate disableBen Widawsky
2013-11-08drm/i915/bdw: Implement edp PSR workaroundsBen Widawsky
2013-11-08drm/i915/bdw: Create a separate BDW rps enableBen Widawsky
2013-11-08drm/i915/bdw: Use HSW formula for ring freq scalingBen Widawsky
2013-11-08drm/i915/bdw: Add Broadwell display FIFO limitsVille Syrjälä
2013-11-08drm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriorityBen Widawsky
2013-11-08drm/i915/bdw: Broadwell also has the "power down well"Paulo Zanoni
2013-11-08drm/i915/bdw: Clock gating initBen Widawsky
2013-11-07drm/i915: Kill vlv_update_rps_cur_delay()Ville Syrjälä
2013-11-07drm/i915: Initialise min/max frequencies before updating RPS registersChris Wilson
2013-11-07drm/i915/vlv: Workaround a punit issue in DDR data rate for 1333.Chon Ming Lee
2013-11-06drm/i915: Pass dev_priv to vlv_gpu_freq() and vlv_freq_opcode()Ville Syrjälä
2013-11-06drm/i915: Improve vlv_gpu_freq() and vlv_freq_opcode()Ville Syrjälä