aboutsummaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_pm.c
AgeCommit message (Expand)Author
2013-07-16drm/i915: Don't try to calculate RC6 residency on GEN4 and beforeDamien Lespiau
2013-07-16drm/i915: We implement WaFbcDisableDpfcClockGating on ilkDamien Lespiau
2013-07-16drm/i915: We implement WaFbcAsynchFlipDisableFbcQueue on ilk and snbDamien Lespiau
2013-07-16drm/i915: We implement WaFbcWaitForVBlankBeforeEnable for ilk and snbDamien Lespiau
2013-07-16drm/i915: simplify rps interrupt enabling/disabling sequenceDaniel Vetter
2013-07-16drm/i915: extract rps interrupt enable/disable helpersDaniel Vetter
2013-07-16drm/i915: unify GT/PM irq postinstall codeDaniel Vetter
2013-07-11drm/i915: kill dev_priv->rps.lockDaniel Vetter
2013-07-08drm/i915: Getter/setter for object attributesBen Widawsky
2013-07-05drm/i915: less magic for stolen preallocated objects w/o gtt offsetDaniel Vetter
2013-07-02drm/i915: Use wait_for() to wait for Punit to change GPU freq on VLVVille Syrjälä
2013-07-01drm/i915: Move fbc members out of lineBen Widawsky
2013-07-01drm/i915: Fix a couple of "should it be static?" sparse warningsDamien Lespiau
2013-07-01drm/i915: Fix reason for per-chip disabling of FBCDamien Lespiau
2013-07-01drm/i915: Make intel_enable_fbc() staticDamien Lespiau
2013-07-01drm/i915: invert the verbosity of intel_enable_fbcPaulo Zanoni
2013-07-01drm/i915: Don't increase the GPU frequency from the delayed VLV rps timerVille Syrjälä
2013-07-01drm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLVVille Syrjälä
2013-07-01drm/i915: Don't wait for Punit after each freq change on VLVVille Syrjälä
2013-07-01drm/i915: Clean up VLV rps code a bitVille Syrjälä
2013-07-01drm/i915: Remove duplicated WaForceL3Serialization:vlvVille Syrjälä
2013-06-13drm/i915: Try harder to disable trickle feed on VLVVille Syrjälä
2013-06-07drm/i915: WA: FBC Render Nuke.Rodrigo Vivi
2013-06-07drm/i915: Refactor ctg+ trickle feed disableVille Syrjälä
2013-06-07drm/i915: Disable trickle feed in ironlake_init_clock_gating()Ville Syrjälä
2013-06-07drm/i915: Disable trickle feed via MI_ARB_STATE for the gen4Ville Syrjälä
2013-06-07drm/i915: Disable primary plane trickle feed for g4xVille Syrjälä
2013-06-06i915/drm: Add private api for power well usageWang Xingchao
2013-06-06drm/i915: update FBC maximum fb sizesPaulo Zanoni
2013-06-05drm/i915: Fix DSPCLK_GATE_D for VLVVille Syrjälä
2013-06-05drm/i915: VLV doesn't have the ILK+ style LP watermark registersVille Syrjälä
2013-06-04drm/i915: store adjusted dotclock in adjusted_mode->clockDaniel Vetter
2013-05-31drm/i915: make PM interrupt writes non-destructiveBen Widawsky
2013-05-31drm/i915: Add PM regs to pre/post installBen Widawsky
2013-05-31drm/i915: add support for 5/6 data buffer partitioning on HaswellPaulo Zanoni
2013-05-31drm/i915: properly set HSW WM_LP watermarksPaulo Zanoni
2013-05-31drm/i915: properly set HSW WM_PIPE registersPaulo Zanoni
2013-05-31drm/i915: add haswell_update_sprite_wmPaulo Zanoni
2013-05-31drm/i915: add "enable" argument to intel_update_sprite_watermarksPaulo Zanoni
2013-05-23drm/i915: change VLV IOSF sideband accessors to not return error codeJani Nikula
2013-05-23drm/i915: rename VLV IOSF sideband functions logicallyJani Nikula
2013-05-23drm/i915: group sideband register accessors to a new fileJani Nikula
2013-05-23drm/i915: set FORCE_ARB_IDLE_PLANES workaroundPaulo Zanoni
2013-05-21drm/i915: MCH_SSKPD is a 64 bit register on HaswellPaulo Zanoni
2013-05-21drm/i915: set the IPS linetime watermarkPaulo Zanoni
2013-05-21drm/i915: fix haswell linetime watermarks calculationPaulo Zanoni
2013-05-21drm/i915: use the mode->htotal to calculate linetime watermarksPaulo Zanoni
2013-05-21drm/i915: remove intel_update_linetime_watermarksPaulo Zanoni
2013-05-21Merge tag 'v3.10-rc2' into drm-intel-next-queuedDaniel Vetter
2013-05-10drm/i915: implement WADPOClockGatingDisable for LPTPaulo Zanoni
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-14 11:52:50 +0000