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path: root/drivers/gpu/drm/nouveau/nouveau_dma.h
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2013-12-18drm: Kill DRM_*MEMORYBARRIERDaniel Vetter
The real linux interfaces are soooo much easier on the eyes ... Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-11-14drm/nvc0-: remove nasty fifo swmthd hack for flip completion methodBen Skeggs
Not required anymore as flips are always done on the kernel's channel, which means we can use a proper software object class instead. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2013-02-20drm/nouveau/fence/nv84-: put processes to sleep while waiting on fencesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03drm/nouveau: port all engines to new engine module formatBen Skeggs
This is a HUGE commit, but it's not nearly as bad as it looks - any problems can be isolated to a particular chipset and engine combination. It was simply too difficult to port each one at a time, the compat layers are *already* ridiculous. Most of the changes here are simply to the glue, the process for each of the engine modules was to start with a standard skeleton and copy+paste the old code into the appropriate places, fixing up variable names etc as needed. v2: Marcin Slusarz <marcin.slusarz@gmail.com> - fix find/replace bug in license header v3: Ben Skeggs <bskeggs@redhat.com> - bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and left no space for kernel's requirements during GEM pushbuf submission. - fix duplicate assignments noticed by clang v4: Marcin Slusarz <marcin.slusarz@gmail.com> - add sparse annotations to nv04_fifo_pause/nv04_fifo_start - use ioread32_native/iowrite32_native for fifo control registers v5: Ben Skeggs <bskeggs@redhat.com> - rebase on v3.6-rc4, modified to keep copy engine fix intact - nv10/fence: unmap fence bo before destroying - fixed fermi regression when using nvidia gr fuc - fixed typo in supported dma_mask checking Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nouveau/ttm: untangle code to support accelerated buffer movesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nouveau: use the same packet header macros as userspaceBen Skeggs
Cosmetic cleanup only. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nve0/ttm: implement buffer moves with weirdo pcopy-on-pgraph methodsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24drm/nv50-/fbcon: move 2d class to subchannel 3Ben Skeggs
Kepler GRAPH has (well, sorta) fixed subchannel<->class assignments, make this match up to keep it happy without trapping. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-29Revert "drm/nouveau: inform userspace of new kernel subchannel requirements"Ben Skeggs
This reverts commit a81f15499887d3f9f24ec70bb9b7e778942a6b7b. Gah, we have a released userspace component using fixed subc assignment that conflicts with this. To avoid breaking ABI this needs to be reverted. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-22drm/nouveau: inform userspace of new kernel subchannel requirementsBen Skeggs
All available subchannels are now available for userspace to do with as it pleases on NVC0+. On all earlier chipsets, the kernel still uses a software object on subc 0 to implement the page flip completion method. I hope to find some decent way of addressing this too, but it's a tad tricker prior to fermi. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25drm/nouveau: remove no_vm/mappable flags from nouveau_boBen Skeggs
'mappable' isn't really used at all, nor is it necessary anymore as the bo code is capable of moving buffers to mappable vram as required. 'no_vm' isn't necessary anymore either, any places that don't want to be mapped into a GPU address space should allocate the VRAM directly instead. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25drm/nv50-nvc0: initialise display sync channelsBen Skeggs
Also imports a couple of helper functions that'll be used to implement page flipping in the following commits.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25drm/nv50-nvc0: request and wait on notification of modeset completionBen Skeggs
This should prevent a number of races from occuring, the most obvious of which will be exposed when we start making use of the "display sync" evo channel for page flipping. The DS channel will reject any command stream that doesn't completely agree with the current "master" state. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21drm/nvc0: initial support for tiled buffer objectsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21drm/nvc0: fix channel dma init pathsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-10-05drm/nouveau: Use semaphores to handle inter-channel sync in hardware.Francisco Jerez
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-02-25drm/nouveau: new gem pushbuf interface, bump to 0.0.16Ben Skeggs
This commit breaks the userspace interface, and requires a new libdrm for nouveau to operate again. The multiple GEM_PUSHBUF ioctls that were present in 0.0.15 for compatibility purposes are now gone, and replaced with the new ioctl which allows for multiple push buffers to be submitted (necessary for hw index buffers in the nv50 3d driver) and relocations to be applied on any buffer. A number of other ioctls (CARD_INIT, GEM_PIN, GEM_UNPIN) that were needed for userspace modesetting have also been removed. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-02-25drm/nv50: switch to indirect push buffer controlsBen Skeggs
PFIFO on G80 and up has a new mode where the main ring buffer is simply a ring of pointers to indirect buffers containing the actual command/data packets. In order to be able to implement index buffers in the 3D driver we need to be able to submit data-only push buffers right after the cmd packet header, which is only possible using the new command submission method. This commit doesn't make it possible to implement index buffers yet, some userspace interface changes will be required, but it does allow for testing/debugging of the hardware-side support in the meantime. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-01-11drm/nouveau: Allocate a per-channel instance of NV_SW.Francisco Jerez
It will be useful for various synchronization purposes, mostly stolen from "[PATCH] drm/nv50: synchronize user channel after buffer object move on kernel channel" by Maarten Maathuis. Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2009-12-11drm/nouveau: Add DRM driver for NVIDIA GPUsBen Skeggs
This adds a drm/kms staging non-API stable driver for GPUs from NVIDIA. This driver is a KMS-based driver and requires a compatible nouveau userspace libdrm and nouveau X.org driver. This driver requires firmware files not available in this kernel tree, interested parties can find them via the nouveau project git archive. This driver is reverse engineered, and is in no way supported by nVidia. Support for nearly the complete range of nvidia hw from nv04->g80 (nv50) is available, and the kms driver should support driving nearly all output types (displayport is under development still) along with supporting suspend/resume. This work is all from the upstream nouveau project found at nouveau.freedesktop.org. The original authors list from nouveau git tree is: Anssi Hannula <anssi.hannula@iki.fi> Ben Skeggs <bskeggs@redhat.com> Francisco Jerez <currojerez@riseup.net> Maarten Maathuis <madman2003@gmail.com> Marcin Koƛcielnicki <koriakin@0x04.net> Matthew Garrett <mjg@redhat.com> Matt Parnell <mparnell@gmail.com> Patrice Mandin <patmandin@gmail.com> Pekka Paalanen <pq@iki.fi> Xavier Chantry <shiningxc@gmail.com> along with project founder Stephane Marchesin <marchesin@icps.u-strasbg.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>