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When operating in IKS mode 'freq_table[MAX_CLUSTERS]' is allocated
memory to store the virtual frequency table. When unregistering the
bL cpufreq driver that memory needs to be freed.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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When not operating in IKS mode 'clk' and 'freq_table' should be cleaned
for all present clusters, something the 'return' statement was
preventing.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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When declaring char name[9] = "cluster";
name[7] is equal to the string termination character '\0'.
But later on doing:
name[7] = cluster_id + '0';
clobbers the termination character, leaving non terminated
strings in the system and potentially causing undertermined
behavior.
By initialising name[9] to "clusterX" the 8th character is
set to '\0' and affecting the 7th character with the cluster
number doesn't overwite anything.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
[ np: The C standard says that the reminder of an initialized array of
a known size should be initialized to zero and therefore this patch is
unneeded, however this patch makes the intent more explicit to others
reading the code. ]
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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Currently following is the frequency range we have for IKS:
A7 (actual freq): 350 MHz -> 1 GHz
A15 (actual freq): 500 MHz-> 1.2 GHz
A15 (virtual freq): 1 GHz -> 2.4 GHz
Problem: From user space it looks like the cpu can support upto 2.4 GHz
physically, which is incorrect. Over that benchmarking tests done by many people
consider the highest freq available in their results, which would make our
results poor.
Instead of using virtual A15 freqs, lets use virtual A7 freqs. That can be
easily done by making virtual A7 freqs half of their actual value. And so our
new range would be: 175 MHz to 1.2 GHz.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reported-by: Praveen Prakash <praveen.prakash@arm.com>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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It is possible that different cpus may race against setting frequency of the
same cluster. We need per-cluster locks to prevent that.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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find_cluster_maxfreq() looks overly complex, lets simplify it.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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There is no actual need of keeping two variables here. Lets keep only one of
them.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Consider following scenario:
- current freq of CPU 0 & 1: 1 GHz, both on cluster A7
- request: CPU0 to 700 MHz (we don't change freq as max is 1 GHz)
- request: CPU1 to 2 GHz, we migrate CPU1 to cluster A15.
At this point we could have reduced frequency of cluster A7 to 700 MHz, as it is
the max now. This patch does it. :)
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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on/off
When a cpu goes down, exit would be called for it. Similarly for every cpu up
init would be called. This would result in same freq table and clk structure to
get freed/allocated again. There is no way for freq table/clk structures to
change between these calls.
Also, when we disable switcher, firstly cpufreq unregister would be called and
hence exit for all cpus and then register would be called, i.e. init would be
called.
For saving time/energy for both cases, lets not free table/clk until module exit
is not done.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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notifiers
Cpufreq driver must be unregistered/registered on switcher on/off to get correct
freq tables for all cpus. This patch does it.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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This patch adds IKS (In Kernel Switcher) support to cpufreq driver. This
creates separate freq table for A7-A15 cpu pair. A15 frequency is vitalized and
is doubled, so that it touches boundaries with A7 frequencies.
Based on Earlier Work from Sudeep.
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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cpufreq_stat has registered notifiers with both cpufreq and cpu core. It adds
cpu/cpu0/cpufreq/stats/ directory with a notifier of cpufreq CPUFREQ_NOTIFY and
removes this directory with a notifier to cpu core.
On bL_switcher enable/disable, cpufreq drivers notifiers gets called and they
call cpufreq_unregister(), followed by cpufreq_register(). For unregister stats
directories per cpu aren't removed, because cpu never went to dead state and cpu
notifier isn't called.
When cpufreq_register() is called, we try to add these directories again and
that simply fails, as directories were already present.
Fix these issues by registering cpufreq_stats too with bL_switcher notifiers, so
that they get unregistered and registered on switcher enable/disable.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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In a system where Linux logical CPUs can migrate between different
physical CPUs, multiple CPU PMUs can logically count events for
each logical CPU, as logical CPUs migrate from one cluster to
another.
This patch allows multiple PMUs to be registered against each CPU.
The pairing of a PMU and a CPU is reperesented by a struct
arm_cpu_pmu, with existing per-CPU state used by perf moving into
this structure.
arm_cpu_pmus are per-cpu-allocated, and hang off
the relevant arm_pmu structure.
This arrangement allows us to find all the CPU-PMU pairings for a
given PMU, but not for a given CPU.
Do do the latter, a list of
all registered CPU PMUs is maintained, and we iterate over that
when we need to find all of a CPU's CPU PMUs.
This is not elegent,
but it shouldn't be a heavy cost since the number of different CPU
PMUs across the system is currently expected to be low (i.e., 2 or
fewer).
This could be improved later.
As a side-effect, the get_hw_events() method no longer has enough
context to provide an answer, because there may be multiple
candidate PMUs for a CPU.
This patch adds the struct arm_pmu * for
the relevant PMU to this interface to resolve this problem,
resulting in trivial changes to various ARM PMU implementations.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
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Add in-modules tests on arm-bl-cpufreq cpufreq driver.
To build the tests, add the following config option:
ARM_BL_CPUFREQ_TEST=y
The tests will run when the driver is loaded, but they are not run
by default. To run the tests, you need to pass the option
test_config=1 to the arm-bl-cpufreq driver when loading it.
Signed-off-by: Mathieu Briand <mathieu.briand@linaro.org>
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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This patch registers the frequency table for each CPU so that the
table and transition statistics are visible through sysfs, and to
governor code.
Since the frequency table is static and never deallocated while the
driver is loaded, there is no call to cpufreq_frequency_table_put_
attr(). A .exit method which calls this function would be needed
if the frequency table ever becomes dynamic.
Signed-off-by: Vishal Bhoj <vishal.bhoj@linaro.org>
Signed-off-by: Dave Martin <dave.martin@linaro.org>
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Some governors refuse to work unless a cpufreq driver advertises a
finite transition latency value.
We can't set this to something sensible until we have real hardware
to calibrate on. In the meantime, we can define this to an
arbitrary value to permit experimentation with governors such as
conservative and ondemand.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
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This patch adds a very simple cpufreq-based frontend to the ARM
big.LITTLE switcher.
This driver simply simulates two performance points corresponding
to the big and little clusters.
There is currently no interface for reporting what the dummy
frequencies exposed by the driver actually mean in terms of real
cluster / performance point combinations. For the very simple case
supported, cpuinfo_max_freq corresponds to big and cpuinfo_min_freq
corresponds to LITTLE.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
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Conflicts:
arch/arm/Kconfig
arch/arm/common/Makefile
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Using late_initcall is too late for IKS.
Requested-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
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The regular gic_raise_softirq() takes as input a CPU mask which is not
adequate when we need to send an IPI to a CPU which is not represented
in the kernel to GIC mapping. That is the case with the b.L switcher
when GIC migration to the inbound CPU has not yet occurred.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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In order to have early assembly code signal other CPUs in the system,
we need to get the physical address for the SGIR register used to
send IPIs. Because the register will be used with a precomputed CPU
interface ID number, there is no need for any locking in the assembly
code where this register is written to.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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Currently, GIC IDs are hardcoded making the code dependent on the x4 b.L
configuration. Let's allow for GIC IDs to be discovered upon switcher
initialization to support other b.L configurations such as the x1 one.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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This is required by the big.LITTLE switcher code.
The gic_migrate_target() changes the CPU interface mapping for the
current CPU to redirect SGIs to the specified interface, and it also
updates the target CPU for each interrupts to that CPU interface
if they were targeting the current interface. Finally, pending
SGIs for the current CPU are forwarded to the new interface.
Because Linux does not use it, the SGI source information for the
forwarded SGIs is not preserved. Neither is the source information
for the SGIs sent by the current CPU to other CPUs adjusted to match
the new CPU interface mapping. The required registers are banked so
only the target CPU could do it.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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Conflicts:
arch/arm/mach-vexpress/Kconfig
arch/arm/mach-vexpress/Makefile
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The low-level layer is now called "mcpm".
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Change the init code for cpuidle-tc2 to check for a
compatible node in the devicetree of "arm,generic"
in preparation for moving it to driver/cpuidle.
Rename functions / variable from tc2_ to bl_.
Signed-off-by: mark hambleton <mahamble@broadcom.com>
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This should be queued right before 'Revert "ARM: common: add GIC bybass disable
on GIC CPU IF save function"'.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
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All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Tested-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
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Previously, the gic_handle_cascade_irq() function was calling the
ARM-specific do_bad_IRQ() function which calls handle_bad_irq() after
acquiring the desk->lock. Locking the cascaded IRQ desc is not needed
for error reporting, so just call handle_bad_irq() directly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
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These functions have been introduced by commit 10a8c383 (irq: introduce
entry and exit functions for chained handlers) in asm/mach/irq.h. This
patch moves them to linux/irqchip/chained_irq.h so that generic irqchip
drivers do not rely on architecture specific header files.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
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This patch prepares the removal of <asm/mach/irq.h> include in the
GIC and VIC irqchip drivers.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
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Currently ARM_DT_BL_CPUFREQ gets enabled by default which causes a
kernel-oops on Arndale board. Forcing this to only when BIG_LITTLE is
enabled fixes following issue.
Unable to handle kernel paging request at virtual address ffffffd0
pgd = c0004000
[ffffffd0] *pgd=6f7fe821, *pte=00000000, *ppte=00000000
Internal error: Oops: 17 [#2] PREEMPT SMP THUMB2
Modules linked in:
CPU: 0 Tainted: G D (3.8.0-rc4+ #2)
PC is at kthread_data+0xa/0x10
LR is at wq_worker_sleeping+0xf/0xa4
pc : [<c0035726>] lr : [<c0032273>] psr: a00000b3
sp : ef0adb98 ip : 00000001 fp : ef0a6080
r10: c1bb7140 r9 : c05cd140 r8 : ef0ac000
r7 : ef0adbb8 r6 : ef0a6080 r5 : 00000000 r4 : b0000000
r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : ef0a6080
Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA Thumb Segment user
Control: 50c5387d Table: 6e4c806a DAC: 55555555
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
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Throughout Linux code big LITTLE is written as "bL". We have used "bl" instead
of "bL". Lets fix it.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reported-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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This is already done by: cpufreq_frequency_table_cpuinfo()
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Some platforms might read frequency table from cluster nodes in DT, as they
might not have specific hardware for that. For them, this patch adds a generic
big LITTLE cpufreq driver.
Freqs passed from DT must be in KHz and DT node should be like:
cluster0: cluster@0 {
reg = <0>;
freqs = <500000 600000 700000 800000>;
}
cluster1: cluster@1 {
reg = <1>;
freqs = <900000 1000000 1100000 1200000>;
}
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Currently, we need to add entry for any new platform using this driver in
compatible list of arm_big_little.c driver. Which is not good.
Lets make this driver independent of slave drivers. Now, slave drivers would be
calling register routine of arm_big_little.c driver and would pass ops as
parameter.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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This adds pr_debugs at various places in driver to understand its behavior
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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We already have clock framework support for vexpress spc controller. So, no
longer need to call spc specific routines from arm_big_little driver.
Finally this driver is generic now, with zero dependency on vexpress.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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Every platform have different way to get available frequencies from boot
loaders. Vexpress platform gets this information from SPC controller.
This patch separates out platform specific part for getting cpufreq table from
arm big LITTLE cpufreq driver. Every platform can pass this information from
their own stubs to this driver.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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This driver shouldn't have any dependency on Vexpress Platform and so can be
converted into generic big LITTLE platform's cpufreq driver. All dependencies
which are currently there would be removed by other patches.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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__cpufreq_driver_target() already validates the requested frequency
against the min and max bounds specified in the policy, so there is
to need to check it again.
This patch removes the bounds check from
vexpress_cpufreq_set_target().
Signed-off-by: Dave Martin <dave.martin@linaro.org>
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Signed-off-by: Dave Martin <dave.martin@linaro.org>
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