From ed202940335e3f9930509025e3d75721e564baca Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Fri, 16 Aug 2013 10:10:09 +0800 Subject: mtd: update the ABI document about the ecc step size We add a new sys node for ecc step size. So update the ABI document about it. Signed-off-by: Huang Shijie Signed-off-by: Artem Bityutskiy [Brian: edited description, modified 'ecc_strength'] Signed-off-by: Brian Norris Signed-off-by: David Woodhouse --- Documentation/ABI/testing/sysfs-class-mtd | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'Documentation/ABI') diff --git a/Documentation/ABI/testing/sysfs-class-mtd b/Documentation/ABI/testing/sysfs-class-mtd index 3105644b3bf..bfd119ace6a 100644 --- a/Documentation/ABI/testing/sysfs-class-mtd +++ b/Documentation/ABI/testing/sysfs-class-mtd @@ -128,9 +128,8 @@ KernelVersion: 3.4 Contact: linux-mtd@lists.infradead.org Description: Maximum number of bit errors that the device is capable of - correcting within each region covering an ecc step. This will - always be a non-negative integer. Note that some devices will - have multiple ecc steps within each writesize region. + correcting within each region covering an ECC step (see + ecc_step_size). This will always be a non-negative integer. In the case of devices lacking any ECC capability, it is 0. @@ -173,3 +172,15 @@ Description: This is generally applicable only to NAND flash devices with ECC capability. It is ignored on devices lacking ECC capability; i.e., devices for which ecc_strength is zero. + +What: /sys/class/mtd/mtdX/ecc_step_size +Date: May 2013 +KernelVersion: 3.10 +Contact: linux-mtd@lists.infradead.org +Description: + The size of a single region covered by ECC, known as the ECC + step. Devices may have several equally sized ECC steps within + each writesize region. + + It will always be a non-negative integer. In the case of + devices lacking any ECC capability, it is 0. -- cgit v1.2.3