From f25d696aed301a38f744d6e4f661e45736a12a1c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 14 Sep 2012 20:14:01 +0000 Subject: ARM: imx: use __iomem pointers for MMIO ARM is moving to stricter checks on readl/write functions, so we need to use the correct types everywhere. This found a bug in mach-armadillo5x0.c, where we attempt mmio on the MXC_CCM_RCSR address that is currently defined to 0xc and consequently causes an illegal address access. Signed-off-by: Arnd Bergmann Cc: Sascha Hauer Cc: Shawn Guo --- arch/arm/plat-mxc/include/mach/mx31.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/plat-mxc/include/mach') diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index dbced61d9fd..ee9b1f9215d 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -76,7 +76,7 @@ #define MX31_RTIC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xec000) #define MX31_ROMP_BASE_ADDR 0x60000000 -#define MX31_ROMP_BASE_ADDR_VIRT 0xfc500000 +#define MX31_ROMP_BASE_ADDR_VIRT IOMEM(0xfc500000) #define MX31_ROMP_SIZE SZ_1M #define MX31_AVIC_BASE_ADDR 0x68000000 @@ -92,11 +92,11 @@ #define MX31_CS3_BASE_ADDR 0xb2000000 #define MX31_CS4_BASE_ADDR 0xb4000000 -#define MX31_CS4_BASE_ADDR_VIRT 0xf6000000 +#define MX31_CS4_BASE_ADDR_VIRT IOMEM(0xf6000000) #define MX31_CS4_SIZE SZ_32M #define MX31_CS5_BASE_ADDR 0xb6000000 -#define MX31_CS5_BASE_ADDR_VIRT 0xf8000000 +#define MX31_CS5_BASE_ADDR_VIRT IOMEM(0xf8000000) #define MX31_CS5_SIZE SZ_32M #define MX31_X_MEMC_BASE_ADDR 0xb8000000 -- cgit v1.2.3