From 36ff8d54ca6f3c251f0b7536bac3c38c57439e23 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 25 Sep 2012 15:37:45 +0900 Subject: video: s3c-fb: clean the bit definition for WINCON register This patch cleans the bit definition for WINCON register. The bit definition for WINCON1 and WINCON2 is removed, because it is not used. Signed-off-by: Jingoo Han --- include/video/samsung_fimd.h | 76 ++++++++------------------------------------ 1 file changed, 13 insertions(+), 63 deletions(-) (limited to 'include/video') diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h index 7ae6c07f2ef..bd0a04e478e 100644 --- a/include/video/samsung_fimd.h +++ b/include/video/samsung_fimd.h @@ -173,18 +173,27 @@ /* WINCONx */ - +#define WINCON(_win) (0x20 + ((_win) * 4)) +#define WINCONx_CSCWIDTH_MASK (0x3 << 26) +#define WINCONx_CSCWIDTH_SHIFT (26) +#define WINCONx_CSCWIDTH_WIDE (0x0 << 26) +#define WINCONx_CSCWIDTH_NARROW (0x3 << 26) +#define WINCONx_ENLOCAL (1 << 22) +#define WINCONx_BUFSTATUS (1 << 21) +#define WINCONx_BUFSEL (1 << 20) +#define WINCONx_BUFAUTOEN (1 << 19) #define WINCONx_BITSWP (1 << 18) #define WINCONx_BYTSWP (1 << 17) #define WINCONx_HAWSWP (1 << 16) #define WINCONx_WSWP (1 << 15) +#define WINCONx_YCbCr (1 << 13) #define WINCONx_BURSTLEN_MASK (0x3 << 9) #define WINCONx_BURSTLEN_SHIFT (9) #define WINCONx_BURSTLEN_16WORD (0x0 << 9) #define WINCONx_BURSTLEN_8WORD (0x1 << 9) #define WINCONx_BURSTLEN_4WORD (0x2 << 9) - #define WINCONx_ENWIN (1 << 0) + #define WINCON0_BPPMODE_MASK (0xf << 2) #define WINCON0_BPPMODE_SHIFT (2) #define WINCON0_BPPMODE_1BPP (0x0 << 2) @@ -196,9 +205,8 @@ #define WINCON0_BPPMODE_18BPP_666 (0x8 << 2) #define WINCON0_BPPMODE_24BPP_888 (0xb << 2) +#define WINCON1_LOCALSEL_CAMIF (1 << 23) #define WINCON1_BLD_PIX (1 << 6) - -#define WINCON1_ALPHA_SEL (1 << 1) #define WINCON1_BPPMODE_MASK (0xf << 2) #define WINCON1_BPPMODE_SHIFT (2) #define WINCON1_BPPMODE_1BPP (0x0 << 2) @@ -216,6 +224,7 @@ #define WINCON1_BPPMODE_24BPP_A1887 (0xc << 2) #define WINCON1_BPPMODE_25BPP_A1888 (0xd << 2) #define WINCON1_BPPMODE_28BPP_A4888 (0xd << 2) +#define WINCON1_ALPHA_SEL (1 << 1) /* S5PV210 */ #define SHADOWCON (0x34) @@ -401,71 +410,12 @@ #define VIDTCON1 (0x14) #define VIDTCON2 (0x18) -/* Window position controls */ - -#define WINCON(_win) (0x20 + ((_win) * 4)) - /* OSD1 and OSD4 do not have register D */ #define VIDOSD_BASE (0x40) #define VIDINTCON0 (0x130) -/* WINCONx */ - -#define WINCONx_CSCWIDTH_MASK (0x3 << 26) -#define WINCONx_CSCWIDTH_SHIFT (26) -#define WINCONx_CSCWIDTH_WIDE (0x0 << 26) -#define WINCONx_CSCWIDTH_NARROW (0x3 << 26) - -#define WINCONx_ENLOCAL (1 << 22) -#define WINCONx_BUFSTATUS (1 << 21) -#define WINCONx_BUFSEL (1 << 20) -#define WINCONx_BUFAUTOEN (1 << 19) -#define WINCONx_YCbCr (1 << 13) - -#define WINCON1_LOCALSEL_CAMIF (1 << 23) - -#define WINCON2_LOCALSEL_CAMIF (1 << 23) -#define WINCON2_BLD_PIX (1 << 6) - -#define WINCON2_ALPHA_SEL (1 << 1) -#define WINCON2_BPPMODE_MASK (0xf << 2) -#define WINCON2_BPPMODE_SHIFT (2) -#define WINCON2_BPPMODE_1BPP (0x0 << 2) -#define WINCON2_BPPMODE_2BPP (0x1 << 2) -#define WINCON2_BPPMODE_4BPP (0x2 << 2) -#define WINCON2_BPPMODE_8BPP_1232 (0x4 << 2) -#define WINCON2_BPPMODE_16BPP_565 (0x5 << 2) -#define WINCON2_BPPMODE_16BPP_A1555 (0x6 << 2) -#define WINCON2_BPPMODE_16BPP_I1555 (0x7 << 2) -#define WINCON2_BPPMODE_18BPP_666 (0x8 << 2) -#define WINCON2_BPPMODE_18BPP_A1665 (0x9 << 2) -#define WINCON2_BPPMODE_19BPP_A1666 (0xa << 2) -#define WINCON2_BPPMODE_24BPP_888 (0xb << 2) -#define WINCON2_BPPMODE_24BPP_A1887 (0xc << 2) -#define WINCON2_BPPMODE_25BPP_A1888 (0xd << 2) -#define WINCON2_BPPMODE_28BPP_A4888 (0xd << 2) - -#define WINCON3_BLD_PIX (1 << 6) - -#define WINCON3_ALPHA_SEL (1 << 1) -#define WINCON3_BPPMODE_MASK (0xf << 2) -#define WINCON3_BPPMODE_SHIFT (2) -#define WINCON3_BPPMODE_1BPP (0x0 << 2) -#define WINCON3_BPPMODE_2BPP (0x1 << 2) -#define WINCON3_BPPMODE_4BPP (0x2 << 2) -#define WINCON3_BPPMODE_16BPP_565 (0x5 << 2) -#define WINCON3_BPPMODE_16BPP_A1555 (0x6 << 2) -#define WINCON3_BPPMODE_16BPP_I1555 (0x7 << 2) -#define WINCON3_BPPMODE_18BPP_666 (0x8 << 2) -#define WINCON3_BPPMODE_18BPP_A1665 (0x9 << 2) -#define WINCON3_BPPMODE_19BPP_A1666 (0xa << 2) -#define WINCON3_BPPMODE_24BPP_888 (0xb << 2) -#define WINCON3_BPPMODE_24BPP_A1887 (0xc << 2) -#define WINCON3_BPPMODE_25BPP_A1888 (0xd << 2) -#define WINCON3_BPPMODE_28BPP_A4888 (0xd << 2) - #define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) #define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) #define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) -- cgit v1.2.3 From 9d07a0bf444c7bafc940ea8f3ba1b1bbbed09793 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 25 Sep 2012 15:48:20 +0900 Subject: video: s3c-fb: move the address definitions for VIDTCON registers The address definitions for VIDTCON registers are moved to right place. Signed-off-by: Jingoo Han --- include/video/samsung_fimd.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'include/video') diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h index bd0a04e478e..bc22f3ccb7b 100644 --- a/include/video/samsung_fimd.h +++ b/include/video/samsung_fimd.h @@ -116,6 +116,7 @@ /* VIDTCON0 */ +#define VIDTCON0 (0x10) #define VIDTCON0_VBPDE_MASK (0xff << 24) #define VIDTCON0_VBPDE_SHIFT (24) #define VIDTCON0_VBPDE_LIMIT (0xff) @@ -138,6 +139,7 @@ /* VIDTCON1 */ +#define VIDTCON1 (0x14) #define VIDTCON1_VFPDE_MASK (0xff << 24) #define VIDTCON1_VFPDE_SHIFT (24) #define VIDTCON1_VFPDE_LIMIT (0xff) @@ -158,6 +160,7 @@ #define VIDTCON1_HSPW_LIMIT (0xff) #define VIDTCON1_HSPW(_x) ((_x) << 0) +#define VIDTCON2 (0x18) #define VIDTCON2 (0x18) #define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23) #define VIDTCON2_LINEVAL_MASK (0x7ff << 11) @@ -405,11 +408,6 @@ #define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ #define VIDCON1_FSTATUS_EVEN (1 << 15) -/* Video timing controls */ -#define VIDTCON0 (0x10) -#define VIDTCON1 (0x14) -#define VIDTCON2 (0x18) - /* OSD1 and OSD4 do not have register D */ #define VIDOSD_BASE (0x40) -- cgit v1.2.3 From 99a2c61e639063803348c71c760c2fc272e83ec6 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 25 Sep 2012 16:43:16 +0900 Subject: video: s3c-fb: move the address definition for VIDOSD register The address definition for VIDTCON VIDOSD is moved to right place. Signed-off-by: Jingoo Han --- include/video/samsung_fimd.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'include/video') diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h index bc22f3ccb7b..c398728cacf 100644 --- a/include/video/samsung_fimd.h +++ b/include/video/samsung_fimd.h @@ -237,6 +237,9 @@ /* Local input channels (windows 0-2) */ #define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win))) +/* VIDOSDx */ + +#define VIDOSD_BASE (0x40) #define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23) #define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11) #define VIDOSDxA_TOPLEFT_X_SHIFT (11) @@ -408,10 +411,6 @@ #define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ #define VIDCON1_FSTATUS_EVEN (1 << 15) -/* OSD1 and OSD4 do not have register D */ - -#define VIDOSD_BASE (0x40) - #define VIDINTCON0 (0x130) #define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) -- cgit v1.2.3 From 60eb8d83f0f70ddf023eb781d7eafffe54f9c5c5 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 25 Sep 2012 16:55:18 +0900 Subject: video: s3c-fb: move the bit definitions for VIDINTCON0 register The bit definitions for VIDINTCON0 registers are moved to right place. Signed-off-by: Jingoo Han --- include/video/samsung_fimd.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'include/video') diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h index c398728cacf..7c9a9bcbcbb 100644 --- a/include/video/samsung_fimd.h +++ b/include/video/samsung_fimd.h @@ -308,6 +308,7 @@ /* Interrupt controls and status */ +#define VIDINTCON0 (0x130) #define VIDINTCON0_FIFOINTERVAL_MASK (0x3f << 20) #define VIDINTCON0_FIFOINTERVAL_SHIFT (20) #define VIDINTCON0_FIFOINTERVAL_LIMIT (0x3f) @@ -336,6 +337,9 @@ #define VIDINTCON0_FIFIOSEL_SHIFT (5) #define VIDINTCON0_FIFIOSEL_WINDOW0 (0x1 << 5) #define VIDINTCON0_FIFIOSEL_WINDOW1 (0x2 << 5) +#define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) +#define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) +#define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) #define VIDINTCON0_FIFOLEVEL_MASK (0x7 << 2) #define VIDINTCON0_FIFOLEVEL_SHIFT (2) @@ -411,12 +415,6 @@ #define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ #define VIDCON1_FSTATUS_EVEN (1 << 15) -#define VIDINTCON0 (0x130) - -#define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) -#define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) -#define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) - #define DITHMODE (0x170) #define WINxMAP(_win) (0x180 + ((_win) * 4)) -- cgit v1.2.3 From 22254540d4b1b22861c4afaeac13c6a43b56de44 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 25 Sep 2012 17:16:52 +0900 Subject: video: s3c-fb: move the bit definitions for WINxMAP and WPALCON register The bit definitions for WINxMAP and WPALCON register are moved to right place. Signed-off-by: Jingoo Han --- include/video/samsung_fimd.h | 22 ++++++---------------- 1 file changed, 6 insertions(+), 16 deletions(-) (limited to 'include/video') diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h index 7c9a9bcbcbb..d5fe38b035b 100644 --- a/include/video/samsung_fimd.h +++ b/include/video/samsung_fimd.h @@ -376,16 +376,20 @@ #define WxKEYCON1_COLVAL_LIMIT (0xffffff) #define WxKEYCON1_COLVAL(_x) ((_x) << 0) - /* Window blanking (MAP) */ - +#define WINxMAP(_win) (0x180 + ((_win) * 4)) #define WINxMAP_MAP (1 << 24) #define WINxMAP_MAP_COLOUR_MASK (0xffffff << 0) #define WINxMAP_MAP_COLOUR_SHIFT (0) #define WINxMAP_MAP_COLOUR_LIMIT (0xffffff) #define WINxMAP_MAP_COLOUR(_x) ((_x) << 0) +/* Winodw palette control */ +#define WPALCON (0x1A0) #define WPALCON_PAL_UPDATE (1 << 9) +#define WPALCON_W4PAL_16BPP_A555 (1 << 8) +#define WPALCON_W3PAL_16BPP_A555 (1 << 7) +#define WPALCON_W2PAL_16BPP_A555 (1 << 6) #define WPALCON_W1PAL_MASK (0x7 << 3) #define WPALCON_W1PAL_SHIFT (3) #define WPALCON_W1PAL_25BPP_A888 (0x0 << 3) @@ -395,7 +399,6 @@ #define WPALCON_W1PAL_18BPP (0x4 << 3) #define WPALCON_W1PAL_16BPP_A555 (0x5 << 3) #define WPALCON_W1PAL_16BPP_565 (0x6 << 3) - #define WPALCON_W0PAL_MASK (0x7 << 0) #define WPALCON_W0PAL_SHIFT (0) #define WPALCON_W0PAL_25BPP_A888 (0x0 << 0) @@ -416,9 +419,6 @@ #define VIDCON1_FSTATUS_EVEN (1 << 15) #define DITHMODE (0x170) -#define WINxMAP(_win) (0x180 + ((_win) * 4)) - - #define DITHMODE_R_POS_MASK (0x3 << 5) #define DITHMODE_R_POS_SHIFT (5) #define DITHMODE_R_POS_8BIT (0x0 << 5) @@ -439,16 +439,6 @@ #define DITHMODE_DITH_EN (1 << 0) -#define WPALCON (0x1A0) - -/* Palette control */ -/* Note for S5PC100: you can still use those macros on WPALCON (aka WPALCON_L), - * but make sure that WPALCON_H W2PAL-W4PAL entries are zeroed out */ -#define WPALCON_W4PAL_16BPP_A555 (1 << 8) -#define WPALCON_W3PAL_16BPP_A555 (1 << 7) -#define WPALCON_W2PAL_16BPP_A555 (1 << 6) - - /* Notes on per-window bpp settings * * Value Win0 Win1 Win2 Win3 Win 4 -- cgit v1.2.3 From 31dd94f9591b5c4c8773468b9592e96dbb5a5a5f Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 25 Sep 2012 17:30:36 +0900 Subject: video: s3c-fb: move the bit definitions for DITHMODE register The bit definitions for DITHMODE registers are moved according to address order. Also, the bit definition of VIDCON1_FSTATUS_EVEN is moved. Signed-off-by: Jingoo Han --- include/video/samsung_fimd.h | 42 ++++++++++++++++++++---------------------- 1 file changed, 20 insertions(+), 22 deletions(-) (limited to 'include/video') diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h index d5fe38b035b..634b18b281a 100644 --- a/include/video/samsung_fimd.h +++ b/include/video/samsung_fimd.h @@ -77,6 +77,7 @@ #define VIDCON1_LINECNT_MASK (0x7ff << 16) #define VIDCON1_LINECNT_SHIFT (16) #define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff) +#define VIDCON1_FSTATUS_EVEN (1 << 15) #define VIDCON1_VSTATUS_MASK (0x3 << 13) #define VIDCON1_VSTATUS_SHIFT (13) #define VIDCON1_VSTATUS_VSYNC (0x0 << 13) @@ -376,6 +377,25 @@ #define WxKEYCON1_COLVAL_LIMIT (0xffffff) #define WxKEYCON1_COLVAL(_x) ((_x) << 0) +/* Dithering control */ +#define DITHMODE (0x170) +#define DITHMODE_R_POS_MASK (0x3 << 5) +#define DITHMODE_R_POS_SHIFT (5) +#define DITHMODE_R_POS_8BIT (0x0 << 5) +#define DITHMODE_R_POS_6BIT (0x1 << 5) +#define DITHMODE_R_POS_5BIT (0x2 << 5) +#define DITHMODE_G_POS_MASK (0x3 << 3) +#define DITHMODE_G_POS_SHIFT (3) +#define DITHMODE_G_POS_8BIT (0x0 << 3) +#define DITHMODE_G_POS_6BIT (0x1 << 3) +#define DITHMODE_G_POS_5BIT (0x2 << 3) +#define DITHMODE_B_POS_MASK (0x3 << 1) +#define DITHMODE_B_POS_SHIFT (1) +#define DITHMODE_B_POS_8BIT (0x0 << 1) +#define DITHMODE_B_POS_6BIT (0x1 << 1) +#define DITHMODE_B_POS_5BIT (0x2 << 1) +#define DITHMODE_DITH_EN (1 << 0) + /* Window blanking (MAP) */ #define WINxMAP(_win) (0x180 + ((_win) * 4)) #define WINxMAP_MAP (1 << 24) @@ -416,28 +436,6 @@ #define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0) #define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ -#define VIDCON1_FSTATUS_EVEN (1 << 15) - -#define DITHMODE (0x170) -#define DITHMODE_R_POS_MASK (0x3 << 5) -#define DITHMODE_R_POS_SHIFT (5) -#define DITHMODE_R_POS_8BIT (0x0 << 5) -#define DITHMODE_R_POS_6BIT (0x1 << 5) -#define DITHMODE_R_POS_5BIT (0x2 << 5) - -#define DITHMODE_G_POS_MASK (0x3 << 3) -#define DITHMODE_G_POS_SHIFT (3) -#define DITHMODE_G_POS_8BIT (0x0 << 3) -#define DITHMODE_G_POS_6BIT (0x1 << 3) -#define DITHMODE_G_POS_5BIT (0x2 << 3) - -#define DITHMODE_B_POS_MASK (0x3 << 1) -#define DITHMODE_B_POS_SHIFT (1) -#define DITHMODE_B_POS_8BIT (0x0 << 1) -#define DITHMODE_B_POS_6BIT (0x1 << 1) -#define DITHMODE_B_POS_5BIT (0x2 << 1) - -#define DITHMODE_DITH_EN (1 << 0) /* Notes on per-window bpp settings * -- cgit v1.2.3 From b4da9c9addcf9ba7bed6314884b904ee646aa171 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 25 Sep 2012 16:19:03 +0900 Subject: video: s3c-fb: add the bit definitions for VIDCON0_VIDOUT_WB This patch adds the bit definitions for VIDCON0_VIDOUT_WB. These definitions are used to support writeback for RGB and i80 interface. Also, output format of writeback is YUV444. Signed-off-by: Jingoo Han --- include/video/samsung_fimd.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include/video') diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h index 634b18b281a..e7554486a2b 100644 --- a/include/video/samsung_fimd.h +++ b/include/video/samsung_fimd.h @@ -24,12 +24,15 @@ #define VIDCON0 (0x00) #define VIDCON0_INTERLACE (1 << 29) -#define VIDCON0_VIDOUT_MASK (0x3 << 26) +#define VIDCON0_VIDOUT_MASK (0x7 << 26) #define VIDCON0_VIDOUT_SHIFT (26) #define VIDCON0_VIDOUT_RGB (0x0 << 26) #define VIDCON0_VIDOUT_TV (0x1 << 26) #define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26) #define VIDCON0_VIDOUT_I80_LDI1 (0x3 << 26) +#define VIDCON0_VIDOUT_WB_RGB (0x4 << 26) +#define VIDCON0_VIDOUT_WB_I80_LDI0 (0x6 << 26) +#define VIDCON0_VIDOUT_WB_I80_LDI1 (0x7 << 26) #define VIDCON0_L1_DATA_MASK (0x7 << 23) #define VIDCON0_L1_DATA_SHIFT (23) -- cgit v1.2.3