From eadce07faa8e71d8a0fc7501a5167fb999200225 Mon Sep 17 00:00:00 2001 From: Clemens Ladisch Date: Sun, 4 Sep 2011 22:17:45 +0200 Subject: ALSA: dice: avoid superflous write at bus reset When a bus reset happens, the enable register is automatically cleared, so we do not need to clear it manually when stopping the stream. Signed-off-by: Clemens Ladisch --- sound/firewire/dice.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'sound/firewire') diff --git a/sound/firewire/dice.c b/sound/firewire/dice.c index 59d5ca4438b..cfa98a83acb 100644 --- a/sound/firewire/dice.c +++ b/sound/firewire/dice.c @@ -246,6 +246,9 @@ static void dice_enable_clear(struct dice *dice) { __be32 value; + if (!dice->global_enabled) + return; + value = 0; snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST, global_address(dice, GLOBAL_ENABLE), @@ -1009,6 +1012,8 @@ static void dice_bus_reset(struct fw_unit *unit) * manner. */ amdtp_out_stream_pcm_abort(&dice->stream); + + dice->global_enabled = false; dice_stream_stop_packets(dice); dice_owner_update(dice); -- cgit v1.2.3