aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-vt8500/gpio.c
blob: 2bcc0ec783df793a981d84346d8eedc8d733d36d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
/* linux/arch/arm/mach-vt8500/gpio.c
 *
 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 */

#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>

#include "devices.h"

#define to_vt8500(__chip) container_of(__chip, struct vt8500_gpio_chip, chip)

#define ENABLE_REGS	0x0
#define DIRECTION_REGS	0x20
#define OUTVALUE_REGS	0x40
#define INVALUE_REGS	0x60

#define EXT_REGOFF	0x1c

static void __iomem *regbase;

struct vt8500_gpio_chip {
	struct gpio_chip	chip;
	unsigned int		shift;
	unsigned int		regoff;
};

static int gpio_to_irq_map[8];

static int vt8500_muxed_gpio_request(struct gpio_chip *chip,
				     unsigned offset)
{
	struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
	unsigned val = readl(regbase + ENABLE_REGS + vt8500_chip->regoff);

	val |= (1 << vt8500_chip->shift << offset);
	writel(val, regbase + ENABLE_REGS + vt8500_chip->regoff);

	return 0;
}

static void vt8500_muxed_gpio_free(struct gpio_chip *chip,
				   unsigned offset)
{
	struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
	unsigned val = readl(regbase + ENABLE_REGS + vt8500_chip->regoff);

	val &= ~(1 << vt8500_chip->shift << offset);
	writel(val, regbase + ENABLE_REGS + vt8500_chip->regoff);
}

static int vt8500_muxed_gpio_direction_input(struct gpio_chip *chip,
				       unsigned offset)
{
	struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
	unsigned val = readl(regbase + DIRECTION_REGS + vt8500_chip->regoff);

	val &= ~(1 << vt8500_chip->shift << offset);
	writel(val, regbase + DIRECTION_REGS + vt8500_chip->regoff);

	return 0;
}

static int vt8500_muxed_gpio_direction_output(struct gpio_chip *chip,
					unsigned offset, int value)
{
	struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
	unsigned val = readl(regbase + DIRECTION_REGS + vt8500_chip->regoff);

	val |= (1 << vt8500_chip->shift << offset);
	writel(val, regbase + DIRECTION_REGS + vt8500_chip->regoff);

	if (value) {
		val = readl(regbase + OUTVALUE_REGS + vt8500_chip->regoff);
		val |= (1 << vt8500_chip->shift << offset);
		writel(val, regbase + OUTVALUE_REGS + vt8500_chip->regoff);
	}
	return 0;
}

static int vt8500_muxed_gpio_get_value(struct gpio_chip *chip,
				       unsigned offset)
{
	struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);

	return (readl(regbase + INVALUE_REGS + vt8500_chip->regoff)
		>> vt8500_chip->shift >> offset) & 1;
}

static void vt8500_muxed_gpio_set_value(struct gpio_chip *chip,
					unsigned offset, int value)
{
	struct vt8500_gpio_chip *vt8500_chip = to_vt8500(chip);
	unsigned val = readl(regbase + INVALUE_REGS + vt8500_chip->regoff);

	if (value)
		val |= (1 << vt8500_chip->shift << offset);
	else
		val &= ~(1 << vt8500_chip->shift << offset);

	writel(val, regbase + INVALUE_REGS + vt8500_chip->regoff);
}

#define VT8500_GPIO_BANK(__name, __shift, __off, __base, __num)		\
{									\
	.chip = {							\
		.label			= __name,			\
		.request		= vt8500_muxed_gpio_request,	\
		.free			= vt8500_muxed_gpio_free,	\
		.direction_input  = vt8500_muxed_gpio_direction_input,	\
		.direction_output = vt8500_muxed_gpio_direction_output,	\
		.get			= vt8500_muxed_gpio_get_value,	\
		.set			= vt8500_muxed_gpio_set_value,	\
		.can_sleep		= 0,				\
		.base			= __base,			\
		.ngpio			= __num,			\
	},								\
	.shift		= __shift,					\
	.regoff		= __off,					\
}

static struct vt8500_gpio_chip vt8500_muxed_gpios[] = {
	VT8500_GPIO_BANK("uart0",	0,	0x0,	8,	4),
	VT8500_GPIO_BANK("uart1",	4,	0x0,	12,	4),
	VT8500_GPIO_BANK("spi0",	8,	0x0,	16,	4),
	VT8500_GPIO_BANK("spi1",	12,	0x0,	20,	4),
	VT8500_GPIO_BANK("spi2",	16,	0x0,	24,	4),
	VT8500_GPIO_BANK("pwmout",	24,	0x0,	28,	2),

	VT8500_GPIO_BANK("sdmmc",	0,	0x4,	30,	11),
	VT8500_GPIO_BANK("ms",		16,	0x4,	41,	7),
	VT8500_GPIO_BANK("i2c0",	24,	0x4,	48,	2),
	VT8500_GPIO_BANK("i2c1",	26,	0x4,	50,	2),

	VT8500_GPIO_BANK("mii",		0,	0x8,	52,	20),
	VT8500_GPIO_BANK("see",		20,	0x8,	72,	4),
	VT8500_GPIO_BANK("ide",		24,	0x8,	76,	7),

	VT8500_GPIO_BANK("ccir",	0,	0xc,	83,	19),

	VT8500_GPIO_BANK("ts",		8,	0x10,	102,	11),

	VT8500_GPIO_BANK("lcd",		0,	0x14,	113,	23),
};

static int vt8500_gpio_direction_input(struct gpio_chip *chip,
				       unsigned offset)
{
	unsigned val = readl(regbase + DIRECTION_REGS + EXT_REGOFF);

	val &= ~(1 << offset);
	writel(val, regbase + DIRECTION_REGS + EXT_REGOFF);
	return 0;
}

static int vt8500_gpio_direction_output(struct gpio_chip *chip,
					unsigned offset, int value)
{
	unsigned val = readl(regbase + DIRECTION_REGS + EXT_REGOFF);

	val |= (1 << offset);
	writel(val, regbase + DIRECTION_REGS + EXT_REGOFF);

	if (value) {
		val = readl(regbase + OUTVALUE_REGS + EXT_REGOFF);
		val |= (1 << offset);
		writel(val, regbase + OUTVALUE_REGS + EXT_REGOFF);
	}
	return 0;
}

static int vt8500_gpio_get_value(struct gpio_chip *chip,
				       unsigned offset)
{
	return (readl(regbase + INVALUE_REGS + EXT_REGOFF) >> offset) & 1;
}

static void vt8500_gpio_set_value(struct gpio_chip *chip,
					unsigned offset, int value)
{
	unsigned val = readl(regbase + OUTVALUE_REGS + EXT_REGOFF);

	if (value)
		val |= (1 << offset);
	else
		val &= ~(1 << offset);

	writel(val, regbase + OUTVALUE_REGS + EXT_REGOFF);
}

static int vt8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
	if (offset > 7)
		return -EINVAL;

	return gpio_to_irq_map[offset];
}

static struct gpio_chip vt8500_external_gpios = {
	.label			= "extgpio",
	.direction_input	= vt8500_gpio_direction_input,
	.direction_output	= vt8500_gpio_direction_output,
	.get			= vt8500_gpio_get_value,
	.set			= vt8500_gpio_set_value,
	.to_irq			= vt8500_gpio_to_irq,
	.can_sleep		= 0,
	.base			= 0,
	.ngpio			= 8,
};

void __init vt8500_gpio_init(void)
{
	int i;

	for (i = 0; i < 8; i++)
		gpio_to_irq_map[i] = wmt_gpio_ext_irq[i];

	regbase = ioremap(wmt_gpio_base, SZ_64K);
	if (!regbase) {
		printk(KERN_ERR "Failed to map MMIO registers for GPIO\n");
		return;
	}

	gpiochip_add(&vt8500_external_gpios);

	for (i = 0; i < ARRAY_SIZE(vt8500_muxed_gpios); i++)
		gpiochip_add(&vt8500_muxed_gpios[i].chip);
}