aboutsummaryrefslogtreecommitdiff
path: root/arch/sh/boards/board-sh7785lcr.c
blob: 2c4771ee84cd3e71f90733ea5c1833ddaa338f72 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
/*
 * Renesas Technology Corp. R0P7785LC0011RL Support.
 *
 * Copyright (C) 2008  Yoshihiro Shimoda
 * Copyright (C) 2009  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/sm501.h>
#include <linux/sm501-regs.h>
#include <linux/fb.h>
#include <linux/mtd/physmap.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/i2c-pca-platform.h>
#include <linux/i2c-algo-pca.h>
#include <linux/usb/r8a66597.h>
#include <linux/sh_intc.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/errno.h>
#include <mach/sh7785lcr.h>
#include <cpu/sh7785.h>
#include <asm/heartbeat.h>
#include <asm/clock.h>
#include <asm/bl_bit.h>

/*
 * NOTE: This board has 2 physical memory maps.
 *	 Please look at include/asm-sh/sh7785lcr.h or hardware manual.
 */
static struct resource heartbeat_resource = {
	.start	= PLD_LEDCR,
	.end	= PLD_LEDCR,
	.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
};

static struct platform_device heartbeat_device = {
	.name		= "heartbeat",
	.id		= -1,
	.num_resources	= 1,
	.resource	= &heartbeat_resource,
};

static struct mtd_partition nor_flash_partitions[] = {
	{
		.name		= "loader",
		.offset		= 0x00000000,
		.size		= 512 * 1024,
	},
	{
		.name		= "bootenv",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 512 * 1024,
	},
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 4 * 1024 * 1024,
	},
	{
		.name		= "data",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
	},
};

static struct physmap_flash_data nor_flash_data = {
	.width		= 4,
	.parts		= nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
};

static struct resource nor_flash_resources[] = {
	[0]	= {
		.start	= NOR_FLASH_ADDR,
		.end	= NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
		.flags	= IORESOURCE_MEM,
	}
};

static struct platform_device nor_flash_device = {
	.name		= "physmap-flash",
	.dev		= {
		.platform_data	= &nor_flash_data,
	},
	.num_resources	= ARRAY_SIZE(nor_flash_resources),
	.resource	= nor_flash_resources,
};

static struct r8a66597_platdata r8a66597_data = {
	.xtal = R8A66597_PLATDATA_XTAL_12MHZ,
	.vif = 1,
};

static struct resource r8a66597_usb_host_resources[] = {
	[0] = {
		.start	= R8A66597_ADDR,
		.end	= R8A66597_ADDR + R8A66597_SIZE - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= evt2irq(0x240),
		.end	= evt2irq(0x240),
		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
	},
};

static struct platform_device r8a66597_usb_host_device = {
	.name		= "r8a66597_hcd",
	.id		= -1,
	.dev = {
		.dma_mask		= NULL,
		.coherent_dma_mask	= 0xffffffff,
		.platform_data		= &r8a66597_data,
	},
	.num_resources	= ARRAY_SIZE(r8a66597_usb_host_resources),
	.resource	= r8a66597_usb_host_resources,
};

static struct resource sm501_resources[] = {
	[0]	= {
		.start	= SM107_MEM_ADDR,
		.end	= SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1]	= {
		.start	= SM107_REG_ADDR,
		.end	= SM107_REG_ADDR + SM107_REG_SIZE - 1,
		.flags	= IORESOURCE_MEM,
	},
	[2]	= {
		.start	= evt2irq(0x340),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct fb_videomode sm501_default_mode_crt = {
	.pixclock	= 35714,	/* 28MHz */
	.xres		= 640,
	.yres		= 480,
	.left_margin	= 105,
	.right_margin	= 16,
	.upper_margin	= 33,
	.lower_margin	= 10,
	.hsync_len	= 39,
	.vsync_len	= 2,
	.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};

static struct fb_videomode sm501_default_mode_pnl = {
	.pixclock	= 40000,	/* 25MHz */
	.xres		= 640,
	.yres		= 480,
	.left_margin	= 2,
	.right_margin	= 16,
	.upper_margin	= 33,
	.lower_margin	= 10,
	.hsync_len	= 39,
	.vsync_len	= 2,
	.sync		= 0,
};

static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
	.def_bpp	= 16,
	.def_mode	= &sm501_default_mode_pnl,
	.flags		= SM501FB_FLAG_USE_INIT_MODE |
			  SM501FB_FLAG_USE_HWCURSOR |
			  SM501FB_FLAG_USE_HWACCEL |
			  SM501FB_FLAG_DISABLE_AT_EXIT |
			  SM501FB_FLAG_PANEL_NO_VBIASEN,
};

static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
	.def_bpp	= 16,
	.def_mode	= &sm501_default_mode_crt,
	.flags		= SM501FB_FLAG_USE_INIT_MODE |
			  SM501FB_FLAG_USE_HWCURSOR |
			  SM501FB_FLAG_USE_HWACCEL |
			  SM501FB_FLAG_DISABLE_AT_EXIT,
};

static struct sm501_platdata_fb sm501_fb_pdata = {
	.fb_route	= SM501_FB_OWN,
	.fb_crt		= &sm501_pdata_fbsub_crt,
	.fb_pnl		= &sm501_pdata_fbsub_pnl,
};

static struct sm501_initdata sm501_initdata = {
	.gpio_high	= {
		.set	= 0x00001fe0,
		.mask	= 0x0,
	},
	.devices	= 0,
	.mclk		= 84 * 1000000,
	.m1xclk		= 112 * 1000000,
};

static struct sm501_platdata sm501_platform_data = {
	.init		= &sm501_initdata,
	.fb		= &sm501_fb_pdata,
};

static struct platform_device sm501_device = {
	.name		= "sm501",
	.id		= -1,
	.dev		= {
		.platform_data	= &sm501_platform_data,
	},
	.num_resources	= ARRAY_SIZE(sm501_resources),
	.resource	= sm501_resources,
};

static struct resource i2c_proto_resources[] = {
	[0] = {
		.start	= PCA9564_PROTO_32BIT_ADDR,
		.end	= PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
		.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
	},
	[1] = {
		.start	= evt2irq(0x380),
		.end	= evt2irq(0x380),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct resource i2c_resources[] = {
	[0] = {
		.start	= PCA9564_ADDR,
		.end	= PCA9564_ADDR + PCA9564_SIZE - 1,
		.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
	},
	[1] = {
		.start	= evt2irq(0x380),
		.end	= evt2irq(0x380),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
	.gpio			= 0,
	.i2c_clock_speed	= I2C_PCA_CON_330kHz,
	.timeout		= HZ,
};

static struct platform_device i2c_device = {
	.name		= "i2c-pca-platform",
	.id		= -1,
	.dev		= {
		.platform_data	= &i2c_platform_data,
	},
	.num_resources	= ARRAY_SIZE(i2c_resources),
	.resource	= i2c_resources,
};

static struct platform_device *sh7785lcr_devices[] __initdata = {
	&heartbeat_device,
	&nor_flash_device,
	&r8a66597_usb_host_device,
	&sm501_device,
	&i2c_device,
};

static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
	{
		I2C_BOARD_INFO("r2025sd", 0x32),
	},
};

static int __init sh7785lcr_devices_setup(void)
{
	i2c_register_board_info(0, sh7785lcr_i2c_devices,
				ARRAY_SIZE(sh7785lcr_i2c_devices));

	if (mach_is_sh7785lcr_pt()) {
		i2c_device.resource = i2c_proto_resources;
		i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
	}

	return platform_add_devices(sh7785lcr_devices,
				    ARRAY_SIZE(sh7785lcr_devices));
}
device_initcall(sh7785lcr_devices_setup);

/* Initialize IRQ setting */
void __init init_sh7785lcr_IRQ(void)
{
	plat_irq_setup_pins(IRQ_MODE_IRQ7654);
	plat_irq_setup_pins(IRQ_MODE_IRQ3210);
}

static int sh7785lcr_clk_init(void)
{
	struct clk *clk;
	int ret;

	clk = clk_get(NULL, "extal");
	if (IS_ERR(clk))
		return PTR_ERR(clk);
	ret = clk_set_rate(clk, 33333333);
	clk_put(clk);

	return ret;
}

static void sh7785lcr_power_off(void)
{
	unsigned char *p;

	p = ioremap(PLD_POFCR, PLD_POFCR + 1);
	if (!p) {
		printk(KERN_ERR "%s: ioremap error.\n", __func__);
		return;
	}
	*p = 0x01;
	iounmap(p);
	set_bl_bit();
	while (1)
		cpu_relax();
}

/* Initialize the board */
static void __init sh7785lcr_setup(char **cmdline_p)
{
	void __iomem *sm501_reg;

	printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");

	pm_power_off = sh7785lcr_power_off;

	/* sm501 DRAM configuration */
	sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL);
	if (!sm501_reg) {
		printk(KERN_ERR "%s: ioremap error.\n", __func__);
		return;
	}

	writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
	iounmap(sm501_reg);
}

/* Return the board specific boot mode pin configuration */
static int sh7785lcr_mode_pins(void)
{
	int value = 0;

	/* These are the factory default settings of S1 and S2.
	 * If you change these dip switches then you will need to
	 * adjust the values below as well.
	 */
	value |= MODE_PIN4; /* Clock Mode 16 */
	value |= MODE_PIN5; /* 32-bit Area0 bus width */
	value |= MODE_PIN6; /* 32-bit Area0 bus width */
	value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
	value |= MODE_PIN8; /* Little Endian */
	value |= MODE_PIN9; /* Master Mode */
	value |= MODE_PIN14; /* No PLL step-up */

	return value;
}

/*
 * The Machine Vector
 */
static struct sh_machine_vector mv_sh7785lcr __initmv = {
	.mv_name		= "SH7785LCR",
	.mv_setup		= sh7785lcr_setup,
	.mv_clk_init		= sh7785lcr_clk_init,
	.mv_init_irq		= init_sh7785lcr_IRQ,
	.mv_mode_pins		= sh7785lcr_mode_pins,
};