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authorVictor Kamensky <victor.kamensky@linaro.org>2013-11-08 18:01:31 +0200
committerAndrey Konovalov <andrey.konovalov@linaro.org>2014-03-11 22:20:46 +0400
commitfc617eb2fb9949021b24218766e4e36b9dfccc20 (patch)
treee5433ccdc3d0bf00af449e8c99db7c0fd995cf7e
parentddfaa90417b1d2c13d1696e0adf02c96556bd9b8 (diff)
hwrng: omap - raw read and write endian fix
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
-rw-r--r--drivers/char/hw_random/omap-rng.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index 9b89ff4881de..d68cf8a21091 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -131,13 +131,13 @@ struct omap_rng_dev {
static inline u32 omap_rng_read(struct omap_rng_dev *priv, u16 reg)
{
- return __raw_readl(priv->base + priv->pdata->regs[reg]);
+ return readl_relaxed(priv->base + priv->pdata->regs[reg]);
}
static inline void omap_rng_write(struct omap_rng_dev *priv, u16 reg,
u32 val)
{
- __raw_writel(val, priv->base + priv->pdata->regs[reg]);
+ writel_relaxed(val, priv->base + priv->pdata->regs[reg]);
}
static int omap_rng_data_present(struct hwrng *rng, int wait)