From 24c94c0097409d19e960ec115f4a88bab3eee012 Mon Sep 17 00:00:00 2001 From: Zhangfei Gao Date: Fri, 11 Apr 2014 20:46:52 +0800 Subject: ARM: dts: hip04: enable only 1 core workaround Signed-off-by: Zhangfei Gao --- arch/arm/boot/dts/hip04.dtsi | 35 ++--------------------------------- 1 file changed, 2 insertions(+), 33 deletions(-) diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi index df10aad19f82..5b7e319fd659 100644 --- a/arch/arm/boot/dts/hip04.dtsi +++ b/arch/arm/boot/dts/hip04.dtsi @@ -26,42 +26,11 @@ #address-cells = <1>; #size-cells = <0>; - cpu-map { - cluster0 { - core0 { - cpu = <&CPU0>; - }; - core1 { - cpu = <&CPU1>; - }; - core2 { - cpu = <&CPU2>; - }; - core3 { - cpu = <&CPU3>; - }; - }; - }; - CPU0: cpu@0 { + cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0>; }; - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - }; - CPU2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <2>; - }; - CPU3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <3>; - }; }; soc { @@ -74,7 +43,7 @@ ranges = <0 0 0xe0000000 0x10000000>; gic: interrupt-controller@c01000 { - compatible = "hisilicon,hip04-gic"; + compatible = "arm,cortex-a15-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; -- cgit v1.2.3