diff options
| author | Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> | 2019-11-26 14:39:01 +0530 |
|---|---|---|
| committer | Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> | 2019-11-26 14:39:01 +0530 |
| commit | 3e5aa6299782de9c3c24715a112ed89c8b44c389 (patch) | |
| tree | 9753dabf0a2f724e449a98e7acfd415fe838ad21 | |
| parent | 2588be292f3d9ca30afaff647e49acaf0a015d31 (diff) | |
rddaniel-4xlr: intialize gic multichip for chip 2 and 3
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
| -rw-r--r-- | plat/arm/board/rddaniel/rddaniel_plat.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/plat/arm/board/rddaniel/rddaniel_plat.c b/plat/arm/board/rddaniel/rddaniel_plat.c index 41e0f7967..21c5f7954 100644 --- a/plat/arm/board/rddaniel/rddaniel_plat.c +++ b/plat/arm/board/rddaniel/rddaniel_plat.c @@ -11,20 +11,26 @@ static gic600_multichip_data_t rdn1e1_multichip_data __init = { .gicd_base = PLAT_ARM_GICD_BASE, .rt_owner = 0, - .chip_count = 2, + .chip_count = 4, .chip_addrs = { PLAT_ARM_GICD_BASE >> 16, - (PLAT_ARM_GICD_BASE + (1ULL << 42)) >> 16 + (PLAT_ARM_GICD_BASE + ((1ULL << 42) * 1)) >> 16, + (PLAT_ARM_GICD_BASE + ((1ULL << 42) * 2)) >> 16, + (PLAT_ARM_GICD_BASE + ((1ULL << 42) * 3)) >> 16, }, .spi_ids = { {32, 255}, - {32, 32} + {32, 32}, + {32, 32}, + {32, 32}, } }; -static uintptr_t rdn1e1_multichip_gicr_frames[3] = { +static uintptr_t rdn1e1_multichip_gicr_frames[] = { PLAT_ARM_GICR_BASE, /* GICR Base of Chip 0 */ - PLAT_ARM_GICR_BASE + (1ULL << 42), /* GICR Base of Chip 1 */ + PLAT_ARM_GICR_BASE + ((1ULL << 42) * 1), /* GICR Base of Chip 1 */ + PLAT_ARM_GICR_BASE + ((1ULL << 42) * 2), /* GICR Base of Chip 2 */ + PLAT_ARM_GICR_BASE + ((1ULL << 42) * 3), /* GICR Base of Chip 3 */ 0U /* Zero Termination */ }; |