diff options
| author | Stephen Warren <swarren@nvidia.com> | 2018-07-31 12:38:27 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-08-01 20:06:10 -0400 |
| commit | a839c3641e4de98981695056eeeb2ec17ba1a4ab (patch) | |
| tree | e2cae64abf3683a916118d9fb3655d7658206aa0 | |
| parent | 61523dde17d1539b8ea361e25909acfdfc465155 (diff) | |
ARM: tegra: align carveout size
Align the size of the carveout region to 2M. This ensures that the size
can be accurately represented by an LPAE page table that uses sections.
This solves a bug (hang at boot time soon after printing the DRAM size)
that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e633d10 ARM: tegra: avoid using secure carveout RAM
Cc: Mark Kettenis <kettenis@openbsd.org>
Cc: Alexander Graf <agraf@suse.de>
Acked-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/board2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 5ecadf705e..421a71b301 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -252,7 +252,7 @@ static ulong carveout_size(void) #elif defined(CONFIG_ARMV7_SECURE_RESERVE_SIZE) // BASE+SIZE might not == 4GB. If so, we want the carveout to cover // from BASE to 4GB, not BASE to BASE+SIZE. - return (0 - CONFIG_ARMV7_SECURE_BASE); + return (0 - CONFIG_ARMV7_SECURE_BASE) & ~(SZ_2M - 1); #else return 0; #endif |