picopi: Change name from warp7 to picopi

Change name of files and variables from warp7 to picopi

Signed-off-by: Jun Nie <jun.nie@linaro.org>

10 files changed, 125 insertions, 125 deletions

diff --git a/plat/imx/imx7/picopi/aarch32/warp7_helpers.S b/plat/imx/imx7/picopi/aarch32/picopi_helpers.S
index 3695b32d..ff48f245 100644
--- a/plat/imx/imx7/picopi/aarch32/warp7_helpers.S
+++ b/plat/imx/imx7/picopi/aarch32/picopi_helpers.S
@@ -35,14 +35,14 @@ func plat_get_my_entrypoint
 endfunc plat_get_my_entrypoint
 
 func plat_crash_console_init
-	mov_imm	r0, PLAT_WARP7_BOOT_UART_BASE
-	mov_imm	r1, PLAT_WARP7_BOOT_UART_CLK_IN_HZ
-	mov_imm	r2, PLAT_WARP7_CONSOLE_BAUDRATE
+	mov_imm	r0, PLAT_PICOPI_BOOT_UART_BASE
+	mov_imm	r1, PLAT_PICOPI_BOOT_UART_CLK_IN_HZ
+	mov_imm	r2, PLAT_PICOPI_CONSOLE_BAUDRATE
 	b	imx_crash_uart_init
 endfunc plat_crash_console_init
 
 func plat_crash_console_putc
-	mov_imm r1, PLAT_WARP7_BOOT_UART_BASE
+	mov_imm r1, PLAT_PICOPI_BOOT_UART_BASE
 	b	imx_crash_uart_putc
 endfunc plat_crash_console_putc
 
diff --git a/plat/imx/imx7/picopi/include/platform_def.h b/plat/imx/imx7/picopi/include/platform_def.h
index 658aee1d..23621d3d 100644
--- a/plat/imx/imx7/picopi/include/platform_def.h
+++ b/plat/imx/imx7/picopi/include/platform_def.h
@@ -21,7 +21,7 @@
 #define PLATFORM_CORE_COUNT		(PLATFORM_CLUSTER0_CORE_COUNT + \
 					 PLATFORM_CLUSTER1_CORE_COUNT)
 
-#define WARP7_PRIMARY_CPU		0
+#define PICOPI_PRIMARY_CPU		0
 
 #define PLAT_NUM_PWR_DOMAINS		(PLATFORM_CLUSTER_COUNT + \
 					PLATFORM_CORE_COUNT)
@@ -74,13 +74,13 @@
 #define DRAM_LIMIT			(DRAM_BASE + DRAM_SIZE)
 
 /* Place OPTEE at minus 32 MB from the end of memory. 0x9e000000 - 0xa0000000 */
-#define WARP7_OPTEE_SIZE		0x02000000
-#define WARP7_OPTEE_BASE		(DRAM_LIMIT - WARP7_OPTEE_SIZE)
-#define WARP7_OPTEE_LIMIT		(WARP7_OPTEE_BASE + WARP7_OPTEE_SIZE)
+#define PICOPI_OPTEE_SIZE		0x02000000
+#define PICOPI_OPTEE_BASE		(DRAM_LIMIT - PICOPI_OPTEE_SIZE)
+#define PICOPI_OPTEE_LIMIT		(PICOPI_OPTEE_BASE + PICOPI_OPTEE_SIZE)
 
 /* Place ATF directly beneath OPTEE. 0x9df00000 - 0x9e000000 */
 #define BL2_RAM_SIZE			0x00100000
-#define BL2_RAM_BASE			(WARP7_OPTEE_BASE - BL2_RAM_SIZE)
+#define BL2_RAM_BASE			(PICOPI_OPTEE_BASE - BL2_RAM_SIZE)
 #define BL2_RAM_LIMIT			(BL2_RAM_BASE + BL2_RAM_SIZE)
 
 /* Optional Mailbox. Only relevant on i.MX7D. 0x9deff000 - 0x9df00000*/
@@ -89,22 +89,22 @@
 #define SHARED_RAM_LIMIT		(SHARED_RAM_BASE + SHARED_RAM_SIZE)
 
 /* Define the absolute location of u-boot 0x87800000 - 0x87900000 */
-#define WARP7_UBOOT_SIZE		0x00100000
-#define WARP7_UBOOT_BASE		(DRAM_BASE + 0x7800000)
-#define WARP7_UBOOT_LIMIT		(WARP7_UBOOT_BASE + WARP7_UBOOT_SIZE)
+#define PICOPI_UBOOT_SIZE		0x00100000
+#define PICOPI_UBOOT_BASE		(DRAM_BASE + 0x7800000)
+#define PICOPI_UBOOT_LIMIT		(PICOPI_UBOOT_BASE + PICOPI_UBOOT_SIZE)
 
 /* Define FIP image absolute location 0x80000000 - 0x80100000 */
-#define WARP7_FIP_SIZE			0x00100000
-#define WARP7_FIP_BASE			(DRAM_BASE)
-#define WARP7_FIP_LIMIT			(WARP7_FIP_BASE + WARP7_FIP_SIZE)
+#define PICOPI_FIP_SIZE			0x00100000
+#define PICOPI_FIP_BASE			(DRAM_BASE)
+#define PICOPI_FIP_LIMIT			(PICOPI_FIP_BASE + PICOPI_FIP_SIZE)
 
 /* Define FIP image location at 1MB offset */
-#define WARP7_FIP_MMC_BASE		(1024 * 1024)
+#define PICOPI_FIP_MMC_BASE		(1024 * 1024)
 
 /* Define the absolute location of DTB 0x83000000 - 0x83100000 */
-#define WARP7_DTB_SIZE			0x00100000
-#define WARP7_DTB_BASE			(DRAM_BASE + 0x03000000)
-#define WARP7_DTB_LIMIT			(WARP7_DTB_BASE + WARP7_DTB_SIZE)
+#define PICOPI_DTB_SIZE			0x00100000
+#define PICOPI_DTB_BASE			(DRAM_BASE + 0x03000000)
+#define PICOPI_DTB_LIMIT			(PICOPI_DTB_BASE + PICOPI_DTB_SIZE)
 
 /*
  * BL2 specific defines.
@@ -118,14 +118,14 @@
 /*
  * BL3-2/OPTEE
  */
-# define BL32_BASE		WARP7_OPTEE_BASE
-# define BL32_LIMIT		(WARP7_OPTEE_BASE + WARP7_OPTEE_SIZE)
+# define BL32_BASE		PICOPI_OPTEE_BASE
+# define BL32_LIMIT		(PICOPI_OPTEE_BASE + PICOPI_OPTEE_SIZE)
 
 /*
  * BL3-3/U-BOOT
  */
-#define BL33_BASE		WARP7_UBOOT_BASE
-#define BL33_LIMIT		(WARP7_UBOOT_BASE + WARP7_UBOOT_SIZE)
+#define BL33_BASE		PICOPI_UBOOT_BASE
+#define BL33_LIMIT		(PICOPI_UBOOT_BASE + PICOPI_UBOOT_SIZE)
 
 /*
  * ATF's view of memory
@@ -172,35 +172,35 @@
 #define MAX_IO_BLOCK_DEVICES		1
 
 /* UART defines */
-#if PLAT_WARP7_UART == 1
-#define PLAT_WARP7_UART_BASE		MXC_UART1_BASE
-#elif PLAT_WARP7_UART == 6
+#if PLAT_PICOPI_UART == 1
+#define PLAT_PICOPI_UART_BASE		MXC_UART1_BASE
+#elif PLAT_PICOPI_UART == 6
 #define IMX_UART_DTE
-#define PLAT_WARP7_UART_BASE		MXC_UART6_BASE
+#define PLAT_PICOPI_UART_BASE		MXC_UART6_BASE
 #else
-#error "define PLAT_WARP7_UART=1 or PLAT_WARP7_UART=6"
+#error "define PLAT_PICOPI_UART=1 or PLAT_PICOPI_UART=6"
 #endif
 
-#define PLAT_WARP7_BOOT_UART_BASE	PLAT_WARP7_UART_BASE
-#define PLAT_WARP7_BOOT_UART_CLK_IN_HZ	24000000
-#define PLAT_WARP7_CONSOLE_BAUDRATE	115200
+#define PLAT_PICOPI_BOOT_UART_BASE	PLAT_PICOPI_UART_BASE
+#define PLAT_PICOPI_BOOT_UART_CLK_IN_HZ	24000000
+#define PLAT_PICOPI_CONSOLE_BAUDRATE	115200
 
 /* MMC defines */
-#ifndef PLAT_WARP7_SD
-#define PLAT_WARP7_SD 3
+#ifndef PLAT_PICOPI_SD
+#define PLAT_PICOPI_SD 3
 #endif
 
-#if PLAT_WARP7_SD == 1
-#define PLAT_WARP7_BOOT_MMC_BASE	USDHC1_BASE
-#endif /* PLAT_WARP7_SD == 1 */
+#if PLAT_PICOPI_SD == 1
+#define PLAT_PICOPI_BOOT_MMC_BASE	USDHC1_BASE
+#endif /* PLAT_PICOPI_SD == 1 */
 
-#if PLAT_WARP7_SD == 2
-#define PLAT_WARP7_BOOT_MMC_BASE	USDHC2_BASE
-#endif /* PLAT_WARP7_SD == 2 */
+#if PLAT_PICOPI_SD == 2
+#define PLAT_PICOPI_BOOT_MMC_BASE	USDHC2_BASE
+#endif /* PLAT_PICOPI_SD == 2 */
 
-#if PLAT_WARP7_SD == 3
-#define PLAT_WARP7_BOOT_MMC_BASE	USDHC3_BASE
-#endif /* PLAT_WARP7_SD == 3 */
+#if PLAT_PICOPI_SD == 3
+#define PLAT_PICOPI_BOOT_MMC_BASE	USDHC3_BASE
+#endif /* PLAT_PICOPI_SD == 3 */
 
 /*
  * GIC related constants
diff --git a/plat/imx/imx7/picopi/warp7_bl2_el3_setup.c b/plat/imx/imx7/picopi/picopi_bl2_el3_setup.c
index 10c4160c..3e53d0df 100644
--- a/plat/imx/imx7/picopi/warp7_bl2_el3_setup.c
+++ b/plat/imx/imx7/picopi/picopi_bl2_el3_setup.c
@@ -27,7 +27,7 @@
 #include <imx_snvs.h>
 #include <imx_usdhc.h>
 #include <imx_wdog.h>
-#include "warp7_private.h"
+#include "picopi_private.h"
 
 #define UART1_CLK_SELECT (CCM_TARGET_ROOT_ENABLE |\
 			  CCM_TRGT_MUX_UART1_CLK_ROOT_OSC_24M)
@@ -47,16 +47,16 @@
 
 uintptr_t plat_get_ns_image_entrypoint(void)
 {
-	return WARP7_UBOOT_BASE;
+	return PICOPI_UBOOT_BASE;
 }
 
-static uint32_t warp7_get_spsr_for_bl32_entry(void)
+static uint32_t picopi_get_spsr_for_bl32_entry(void)
 {
 	return SPSR_MODE32(MODE32_svc, SPSR_T_ARM, SPSR_E_LITTLE,
 			   DISABLE_ALL_EXCEPTIONS);
 }
 
-static uint32_t warp7_get_spsr_for_bl33_entry(void)
+static uint32_t picopi_get_spsr_for_bl33_entry(void)
 {
 	return SPSR_MODE32(MODE32_svc,
 			   plat_get_ns_image_entrypoint() & 0x1,
@@ -108,7 +108,7 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
 		else
 			bl_mem_params->ep_info.args.arg2 = 0;
 		bl_mem_params->ep_info.args.arg3 = 0;
-		bl_mem_params->ep_info.spsr = warp7_get_spsr_for_bl32_entry();
+		bl_mem_params->ep_info.spsr = picopi_get_spsr_for_bl32_entry();
 		break;
 
 	case BL33_IMAGE_ID:
@@ -119,7 +119,7 @@ int bl2_plat_handle_post_image_load(unsigned int image_id)
 
 		/* BL33 expects to receive the primary CPU MPID (through r0) */
 		bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
-		bl_mem_params->ep_info.spsr = warp7_get_spsr_for_bl33_entry();
+		bl_mem_params->ep_info.spsr = picopi_get_spsr_for_bl33_entry();
 		break;
 
 	default:
@@ -135,83 +135,83 @@ void bl2_el3_plat_arch_setup(void)
 	/* Setup the MMU here */
 }
 
-#define WARP7_UART1_TX_MUX \
+#define PICOPI_UART1_TX_MUX \
 	IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA_ALT0_UART1_TX_DATA
 
-#define WARP7_UART1_TX_FEATURES \
+#define PICOPI_UART1_TX_FEATURES \
 	(IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_PS_3_100K_PU	| \
 	 IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_PE_EN		| \
 	 IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_HYS_EN		| \
 	 IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_DSE_1_X4)
 
-#define WARP7_UART1_RX_MUX \
+#define PICOPI_UART1_RX_MUX \
 	IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_ALT0_UART1_RX_DATA
 
-#define WARP7_UART1_RX_FEATURES \
+#define PICOPI_UART1_RX_FEATURES \
 	(IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_PS_3_100K_PU	| \
 	 IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_PE_EN		| \
 	 IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_HYS_EN		| \
 	 IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_DSE_1_X4)
 
-#define WARP7_UART6_TX_MUX \
+#define PICOPI_UART6_TX_MUX \
 	IOMUXC_SW_MUX_CTL_PAD_ECSPI1_MOSI_ALT1_UART6_TX_DATA
 
-#define WARP7_UART6_TX_FEATURES \
+#define PICOPI_UART6_TX_FEATURES \
 	(IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_PS_3_100K_PU		| \
 	 IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_PE_EN		| \
 	 IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_HYS_EN		| \
 	 IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_DSE_1_X4)
 
-#define WARP7_UART6_RX_MUX \
+#define PICOPI_UART6_RX_MUX \
 	IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_ALT1_UART6_RX_DATA
 
-#define WARP7_UART6_RX_FEATURES \
+#define PICOPI_UART6_RX_FEATURES \
 	(IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_PS_3_100K_PU		| \
 	 IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_PE_EN		| \
 	 IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_HYS_EN		| \
 	 IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_DSE_1_X4)
 
-static void warp7_setup_pinmux(void)
+static void picopi_setup_pinmux(void)
 {
 	/* Configure UART1 TX */
 	imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA_OFFSET,
-					 WARP7_UART1_TX_MUX);
+					 PICOPI_UART1_TX_MUX);
 	imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_UART1_TX_DATA_OFFSET,
-				     WARP7_UART1_TX_FEATURES);
+				     PICOPI_UART1_TX_FEATURES);
 
 	/* Configure UART1 RX */
 	imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_OFFSET,
-					 WARP7_UART1_RX_MUX);
+					 PICOPI_UART1_RX_MUX);
 	imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_UART1_RX_DATA_OFFSET,
-				     WARP7_UART1_RX_FEATURES);
+				     PICOPI_UART1_RX_FEATURES);
 
 	/* Configure UART6 TX */
 	imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_ECSPI1_MOSI_OFFSET,
-					 WARP7_UART6_TX_MUX);
+					 PICOPI_UART6_TX_MUX);
 	imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_ECSPI1_MOSI_OFFSET,
-				     WARP7_UART6_TX_FEATURES);
+				     PICOPI_UART6_TX_FEATURES);
 
 	/* Configure UART6 RX */
 	imx_io_muxc_set_pad_alt_function(IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_OFFSET,
-					 WARP7_UART6_RX_MUX);
+					 PICOPI_UART6_RX_MUX);
 	imx_io_muxc_set_pad_features(IOMUXC_SW_PAD_CTL_PAD_ECSPI1_SCLK_OFFSET,
-				     WARP7_UART6_RX_FEATURES);
+				     PICOPI_UART6_RX_FEATURES);
 }
 
-static void warp7_usdhc_setup(void)
+static void picopi_usdhc_setup(void)
 {
 	imx_usdhc_params_t params;
 	struct mmc_device_info info;
 
 	zeromem(&params, sizeof(imx_usdhc_params_t));
-	params.reg_base = PLAT_WARP7_BOOT_MMC_BASE;
+	params.reg_base = PLAT_PICOPI_BOOT_MMC_BASE;
 	params.clk_rate = 25000000;
 	params.bus_width = MMC_BUS_WIDTH_8;
 	info.mmc_dev_type = MMC_IS_EMMC;
 	imx_usdhc_init(&params, &info);
 }
 
-static void warp7_setup_system_counter(void)
+static void picopi_setup_system_counter(void)
 {
 	unsigned long freq = SYS_COUNTER_FREQ_IN_TICKS;
 
@@ -223,7 +223,7 @@ static void warp7_setup_system_counter(void)
 		      CNTCR_FCREQ(0) | CNTCR_HDBG | CNTCR_EN);
 }
 
-static void warp7_setup_wdog_clocks(void)
+static void picopi_setup_wdog_clocks(void)
 {
 	uint32_t wdog_en_bits = (uint32_t)WDOG_CLK_SELECT;
 
@@ -234,7 +234,7 @@ static void warp7_setup_wdog_clocks(void)
 	imx_clock_enable_wdog(3);
 }
 
-static void warp7_setup_usb_clocks(void)
+static void picopi_setup_usb_clocks(void)
 {
 	uint32_t usb_en_bits = (uint32_t)USB_CLK_SELECT;
 
@@ -253,7 +253,7 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
 {
 	uint32_t uart1_en_bits = (uint32_t)UART1_CLK_SELECT;
 	uint32_t uart6_en_bits = (uint32_t)UART6_CLK_SELECT;
-	uint32_t usdhc_clock_sel = PLAT_WARP7_SD - 1;
+	uint32_t usdhc_clock_sel = PLAT_PICOPI_SD - 1;
 
 	/* Initialize the AIPS */
 	imx_aips_init();
@@ -266,32 +266,32 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2,
 	imx_clock_enable_uart(0, uart1_en_bits);
 	imx_clock_enable_uart(5, uart6_en_bits);
 	imx_clock_enable_usdhc(usdhc_clock_sel, USDHC_CLK_SELECT);
-	warp7_setup_system_counter();
-	warp7_setup_wdog_clocks();
-	warp7_setup_usb_clocks();
+	picopi_setup_system_counter();
+	picopi_setup_wdog_clocks();
+	picopi_setup_usb_clocks();
 
 	/* Setup pin-muxes */
-	warp7_setup_pinmux();
+	picopi_setup_pinmux();
 
 	/* Init UART, storage and friends */
-	console_init(PLAT_WARP7_BOOT_UART_BASE, PLAT_WARP7_BOOT_UART_CLK_IN_HZ,
-		     PLAT_WARP7_CONSOLE_BAUDRATE);
-	warp7_usdhc_setup();
+	console_init(PLAT_PICOPI_BOOT_UART_BASE, PLAT_PICOPI_BOOT_UART_CLK_IN_HZ,
+		     PLAT_PICOPI_CONSOLE_BAUDRATE);
+	picopi_usdhc_setup();
 
 	/* Open handles to persistent storage */
-	plat_warp7_io_setup();
+	plat_picopi_io_setup();
 
 	/* Setup higher-level functionality CAAM, RTC etc */
 	imx_caam_init();
 	imx_wdog_init();
 
 	/* Print out the expected memory map */
-	VERBOSE("\tOPTEE      0x%08x-0x%08x\n", WARP7_OPTEE_BASE, WARP7_OPTEE_LIMIT);
+	VERBOSE("\tOPTEE      0x%08x-0x%08x\n", PICOPI_OPTEE_BASE, PICOPI_OPTEE_LIMIT);
 	VERBOSE("\tATF/BL2    0x%08x-0x%08x\n", BL2_RAM_BASE, BL2_RAM_LIMIT);
 	VERBOSE("\tSHRAM      0x%08x-0x%08x\n", SHARED_RAM_BASE, SHARED_RAM_LIMIT);
-	VERBOSE("\tFIP        0x%08x-0x%08x\n", WARP7_FIP_BASE, WARP7_FIP_LIMIT);
-	VERBOSE("\tDTB        0x%08x-0x%08x\n", WARP7_DTB_BASE, WARP7_DTB_LIMIT);
-	VERBOSE("\tUBOOT/BL33 0x%08x-0x%08x\n", WARP7_UBOOT_BASE, WARP7_UBOOT_LIMIT);
+	VERBOSE("\tFIP        0x%08x-0x%08x\n", PICOPI_FIP_BASE, PICOPI_FIP_LIMIT);
+	VERBOSE("\tDTB        0x%08x-0x%08x\n", PICOPI_DTB_BASE, PICOPI_DTB_LIMIT);
+	VERBOSE("\tUBOOT/BL33 0x%08x-0x%08x\n", PICOPI_UBOOT_BASE, PICOPI_UBOOT_LIMIT);
 }
 
 /*
diff --git a/plat/imx/imx7/picopi/warp7_bl2_mem_params_desc.c b/plat/imx/imx7/picopi/picopi_bl2_mem_params_desc.c
index 12254d46..5f510aec 100644
--- a/plat/imx/imx7/picopi/warp7_bl2_mem_params_desc.c
+++ b/plat/imx/imx7/picopi/picopi_bl2_mem_params_desc.c
@@ -21,8 +21,8 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
 		SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
 				      image_info_t, 0),
 
-		.image_info.image_base = WARP7_OPTEE_BASE,
-		.image_info.image_max_size = WARP7_OPTEE_SIZE,
+		.image_info.image_base = PICOPI_OPTEE_BASE,
+		.image_info.image_max_size = PICOPI_OPTEE_SIZE,
 
 		.next_handoff_image_id = BL33_IMAGE_ID,
 	},
@@ -32,8 +32,8 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
 				      VERSION_2, entry_point_info_t, SECURE | NON_EXECUTABLE),
 		SET_STATIC_PARAM_HEAD(image_info, PARAM_IMAGE_BINARY,
 				      VERSION_2, image_info_t, 0),
-		.image_info.image_base = WARP7_DTB_BASE,
-		.image_info.image_max_size = WARP7_DTB_SIZE,
+		.image_info.image_base = PICOPI_DTB_BASE,
+		.image_info.image_max_size = PICOPI_DTB_SIZE,
 		.next_handoff_image_id = INVALID_IMAGE_ID,
 	},
 	{
@@ -45,8 +45,8 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
 
 		SET_STATIC_PARAM_HEAD(image_info, PARAM_EP, VERSION_2,
 				      image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
-		.image_info.image_base = WARP7_OPTEE_BASE,
-		.image_info.image_max_size = WARP7_OPTEE_SIZE,
+		.image_info.image_base = PICOPI_OPTEE_BASE,
+		.image_info.image_max_size = PICOPI_OPTEE_SIZE,
 
 		.next_handoff_image_id = INVALID_IMAGE_ID,
 	},
@@ -79,8 +79,8 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
 
 			SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
 					      VERSION_2, image_info_t, 0),
-			.image_info.image_base = WARP7_UBOOT_BASE,
-			.image_info.image_max_size = WARP7_UBOOT_SIZE,
+			.image_info.image_base = PICOPI_UBOOT_BASE,
+			.image_info.image_max_size = PICOPI_UBOOT_SIZE,
 		# endif /* PRELOADED_BL33_BASE */
 
 		.next_handoff_image_id = INVALID_IMAGE_ID,
diff --git a/plat/imx/imx7/picopi/warp7_image_load.c b/plat/imx/imx7/picopi/picopi_image_load.c
index 1e3a2b0b..1e3a2b0b 100644
--- a/plat/imx/imx7/picopi/warp7_image_load.c
+++ b/plat/imx/imx7/picopi/picopi_image_load.c
diff --git a/plat/imx/imx7/picopi/warp7_io_storage.c b/plat/imx/imx7/picopi/picopi_io_storage.c
index 0c88039a..327e4405 100644
--- a/plat/imx/imx7/picopi/warp7_io_storage.c
+++ b/plat/imx/imx7/picopi/picopi_io_storage.c
@@ -16,21 +16,21 @@
 static const io_dev_connector_t *fip_dev_con;
 static uintptr_t fip_dev_handle;
 
-#ifndef WARP7_FIP_MMAP
+#ifndef PICOPI_FIP_MMAP
 static const io_dev_connector_t *mmc_dev_con;
 static uintptr_t mmc_dev_handle;
 
 static const io_block_spec_t mmc_fip_spec = {
-	.offset = WARP7_FIP_MMC_BASE,
-	.length = WARP7_FIP_SIZE
+	.offset = PICOPI_FIP_MMC_BASE,
+	.length = PICOPI_FIP_SIZE
 };
 
 static const io_block_dev_spec_t mmc_dev_spec = {
 	/* It's used as temp buffer in block driver. */
 	.buffer		= {
-		.offset	= WARP7_FIP_BASE,
+		.offset	= PICOPI_FIP_BASE,
 		/* do we need a new value? */
-		.length = WARP7_FIP_SIZE
+		.length = PICOPI_FIP_SIZE
 	},
 	.ops		= {
 		.read	= mmc_read_blocks,
@@ -46,8 +46,8 @@ static const io_dev_connector_t *memmap_dev_con;
 static uintptr_t memmap_dev_handle;
 
 static const io_block_spec_t fip_block_spec = {
-	.offset = WARP7_FIP_BASE,
-	.length = WARP7_FIP_SIZE
+	.offset = PICOPI_FIP_BASE,
+	.length = PICOPI_FIP_SIZE
 };
 static int open_memmap(const uintptr_t spec);
 #endif
@@ -107,7 +107,7 @@ struct plat_io_policy {
 };
 
 static const struct plat_io_policy policies[] = {
-#ifndef WARP7_FIP_MMAP
+#ifndef PICOPI_FIP_MMAP
 	[FIP_IMAGE_ID] = {
 		&mmc_dev_handle,
 		(uintptr_t)&mmc_fip_spec,
@@ -196,7 +196,7 @@ static int open_fip(const uintptr_t spec)
 	return result;
 }
 
-#ifndef WARP7_FIP_MMAP
+#ifndef PICOPI_FIP_MMAP
 static int open_mmc(const uintptr_t spec)
 {
 	int result;
@@ -246,11 +246,11 @@ int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
 	return result;
 }
 
-void plat_warp7_io_setup(void)
+void plat_picopi_io_setup(void)
 {
 	int result __unused;
 
-#ifndef WARP7_FIP_MMAP
+#ifndef PICOPI_FIP_MMAP
 	result = register_io_dev_block(&mmc_dev_con);
 	assert(result == 0);
 
diff --git a/plat/imx/imx7/picopi/warp7_private.h b/plat/imx/imx7/picopi/picopi_private.h
index c93acacf..92e063d7 100644
--- a/plat/imx/imx7/picopi/warp7_private.h
+++ b/plat/imx/imx7/picopi/picopi_private.h
@@ -4,12 +4,12 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#ifndef __WARP7_PRIVATE_H__
-#define __WARP7_PRIVATE_H__
+#ifndef __PICOPI_PRIVATE_H__
+#define __PICOPI_PRIVATE_H__
 
 /*******************************************************************************
  * Function and variable prototypes
  ******************************************************************************/
-void plat_warp7_io_setup(void);
+void plat_picopi_io_setup(void);
 
-#endif /*__WARP7_PRIVATE_H__ */
+#endif /*__PICOPI_PRIVATE_H__ */
diff --git a/plat/imx/imx7/picopi/warp7_rotpk.S b/plat/imx/imx7/picopi/picopi_rotpk.S
index f74b6d25..5a5126e0 100644
--- a/plat/imx/imx7/picopi/warp7_rotpk.S
+++ b/plat/imx/imx7/picopi/picopi_rotpk.S
@@ -4,12 +4,12 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-	.global warp7_rotpk_hash
-	.global warp7_rotpk_hash_end
-warp7_rotpk_hash:
+	.global picopi_rotpk_hash
+	.global picopi_rotpk_hash_end
+picopi_rotpk_hash:
 	/* DER header */
 	.byte 0x30, 0x31, 0x30, 0x0D, 0x06, 0x09, 0x60, 0x86, 0x48
 	.byte 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, 0x20
 	/* SHA256 */
 	.incbin ROTPK_HASH
-warp7_rotpk_hash_end:
+picopi_rotpk_hash_end:
diff --git a/plat/imx/imx7/picopi/warp7_trusted_boot.c b/plat/imx/imx7/picopi/picopi_trusted_boot.c
index 3c054f4b..af8430b6 100644
--- a/plat/imx/imx7/picopi/warp7_trusted_boot.c
+++ b/plat/imx/imx7/picopi/picopi_trusted_boot.c
@@ -7,13 +7,13 @@
 #include <debug.h>
 #include <platform.h>
 
-extern char warp7_rotpk_hash[], warp7_rotpk_hash_end[];
+extern char picopi_rotpk_hash[], picopi_rotpk_hash_end[];
 
 int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
 			unsigned int *flags)
 {
-	*key_ptr = warp7_rotpk_hash;
-	*key_len = warp7_rotpk_hash_end - warp7_rotpk_hash;
+	*key_ptr = picopi_rotpk_hash;
+	*key_len = picopi_rotpk_hash_end - picopi_rotpk_hash;
 	*flags = ROTPK_IS_HASH;
 
 	return 0;
diff --git a/plat/imx/imx7/picopi/platform.mk b/plat/imx/imx7/picopi/platform.mk
index d0f4da3a..f946f03c 100644
--- a/plat/imx/imx7/picopi/platform.mk
+++ b/plat/imx/imx7/picopi/platform.mk
@@ -24,7 +24,7 @@ PLAT_INCLUDES		:=	-Idrivers/imx/uart			\
 				-Iinclude/common/tbbr			\
 				-Iinclude/plat/arm/common/		\
 				-Iplat/imx/common/include/		\
-				-Iplat/imx/imx7/warp7/include		\
+				-Iplat/imx/imx7/picopi/include		\
 				-Idrivers/imx/timer			\
 				-Idrivers/imx/usdhc			\
 				-Iplat/imx/imx7/include
@@ -56,11 +56,11 @@ BL2_SOURCES		+=	common/desc_image_load.c			\
 				plat/imx/common/imx_snvs.c			\
 				plat/imx/common/imx_wdog.c			\
 				plat/imx/common/imx7_clock.c		\
-				plat/imx/imx7/warp7/aarch32/warp7_helpers.S	\
-				plat/imx/imx7/warp7/warp7_bl2_el3_setup.c	\
-				plat/imx/imx7/warp7/warp7_bl2_mem_params_desc.c \
-				plat/imx/imx7/warp7/warp7_io_storage.c		\
-				plat/imx/imx7/warp7/warp7_image_load.c		\
+				plat/imx/imx7/picopi/aarch32/picopi_helpers.S	\
+				plat/imx/imx7/picopi/picopi_bl2_el3_setup.c	\
+				plat/imx/imx7/picopi/picopi_bl2_mem_params_desc.c \
+				plat/imx/imx7/picopi/picopi_io_storage.c		\
+				plat/imx/imx7/picopi/picopi_image_load.c		\
 				${XLAT_TABLES_LIB_SRCS}
 
 ifneq (${TRUSTED_BOARD_BOOT},0)
@@ -75,8 +75,8 @@ AUTH_SOURCES	:=	drivers/auth/auth_mod.c			\
 
 BL2_SOURCES		+=	${AUTH_SOURCES}					\
 				plat/common/tbbr/plat_tbbr.c			\
-				plat/imx/imx7/warp7/warp7_trusted_boot.c	\
-				plat/imx/imx7/warp7/warp7_rotpk.S
+				plat/imx/imx7/picopi/picopi_trusted_boot.c	\
+				plat/imx/imx7/picopi/picopi_rotpk.S
 
 ROT_KEY             = $(BUILD_PLAT)/rot_key.pem
 ROTPK_HASH          = $(BUILD_PLAT)/rotpk_sha256.bin
@@ -84,7 +84,7 @@ ROTPK_HASH          = $(BUILD_PLAT)/rotpk_sha256.bin
 $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
 $(eval $(call MAKE_LIB_DIRS))
 
-$(BUILD_PLAT)/bl2/warp7_rotpk.o: $(ROTPK_HASH)
+$(BUILD_PLAT)/bl2/picopi_rotpk.o: $(ROTPK_HASH)
 
 certificates: $(ROT_KEY)
 
@@ -120,9 +120,9 @@ SEPARATE_CODE_AND_RODATA	:= 1
 # Use Coherent memory
 USE_COHERENT_MEM		:= 1
 
-# PLAT_WARP7_UART
-PLAT_WARP7_UART			:=1
-$(eval $(call add_define,PLAT_WARP7_UART))
+# PLAT_PICOPI_UART
+PLAT_PICOPI_UART			:=1
+$(eval $(call add_define,PLAT_PICOPI_UART))
 
 # Add the build options to pack BLx images and kernel device tree
 # in the FIP if the platform requires.