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authorJun Nie <jun.nie@linaro.org>2018-08-07 09:22:23 +0800
committerJun Nie <jun.nie@linaro.org>2018-08-07 14:49:51 +0800
commit43847da26a4e1172c1906a12e0790564a20259f7 (patch)
tree8e16d9818ef5822873a9996854529e08f767ae24
parent1221a86280b9a5cce022ca89b3a0404ead9ed7cf (diff)
imx7: add serial console output
add serial console output. Input function will be added later Signed-off-by: Jun Nie <jun.nie@linaro.org>
-rw-r--r--drivers/nxp/uart/nxp_console.S294
-rw-r--r--drivers/nxp/uart/nxp_console.h155
2 files changed, 449 insertions, 0 deletions
diff --git a/drivers/nxp/uart/nxp_console.S b/drivers/nxp/uart/nxp_console.S
new file mode 100644
index 0000000..22baa87
--- /dev/null
+++ b/drivers/nxp/uart/nxp_console.S
@@ -0,0 +1,294 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <arch.h>
+#include <asm_macros.S>
+#include "nxp_console.h"
+
+ .globl console_init
+ .globl console_putc
+ .globl console_getc
+ .globl console_flush
+ .globl console_core_init
+ .globl console_core_putc
+ .globl console_core_getc
+ .globl console_core_flush
+
+ /*
+ * The console base is in the data section and not in .bss
+ * even though it is zero-init. In particular, this allows
+ * the console functions to start using this variable before
+ * the runtime memory is initialized for images which do not
+ * need to copy the .data section from ROM to RAM.
+ */
+.section .data.console_base ; .align 2
+ console_base: .word 0x0
+
+ /* -----------------------------------------------
+ * int console_init(uintptr_t base_addr,
+ * unsigned int uart_clk, unsigned int baud_rate)
+ * Function to initialize the console without a
+ * C Runtime to print debug information. It saves
+ * the console base to the data section.
+ * In: r0 - console base address
+ * r1 - Uart clock in Hz
+ * r2 - Baud rate
+ * out: return 1 on success else 0 on error
+ * Clobber list : r1 - r3
+ * -----------------------------------------------
+ */
+func console_init
+ ldr r3, =console_base
+ str r0, [r3]
+ b console_core_init
+endfunc console_init
+
+ /* -----------------------------------------------
+ * int console_core_init(uintptr_t base_addr,
+ * unsigned int uart_clk, unsigned int baud_rate)
+ * Function to initialize the console without a
+ * C Runtime to print debug information. This
+ * function will be accessed by console_init and
+ * crash reporting.
+ * In: r0 - console base address
+ * r1 - Uart clock in Hz
+ * r2 - Baud rate
+ * Out: return 1 on success else 0 on error
+ * Clobber list : r1, r2, r3, r4
+ * -----------------------------------------------
+ */
+func console_core_init
+ /* Check the input base address */
+ cmp r0, #0
+ beq core_init_fail
+ /* Check baud rate and uart clock for sanity */
+ cmp r1, #0
+ beq core_init_fail
+ cmp r2, #0
+ beq core_init_fail
+
+ /* Free up r1 as a scratch reg */
+ mov r4, r0
+ mov r0, r1
+
+ /* Reset UART via CR2 */
+ add r1, r4, #MXC_UART_CR2_OFFSET
+ movs r3, #0
+ str r3, [r4, #MXC_UART_CR2_OFFSET]
+
+ /* Wait for reset complete */
+__wait_cr2_reset:
+ ldr r3, [r1, #0]
+ ands r3, #MXC_UART_CR2_SRST
+ beq __wait_cr2_reset
+
+ /* Enable UART */
+ movs r3, #MXC_UART_CR1_UARTEN
+ mov r1, r2
+ str r3, [r4, #MXC_UART_CR1_OFFSET]
+
+ /*
+ * Ignore RTC/CTS - disable reset
+ * Magic value #16423 =>
+ * MXC_UART_CR2_IRTS | MXC_UART_CR2_WS | MXC_UART_CR2_TXEN | MXC_UART_CR2_RXEN | MXC_UART_CR2_SRST
+ */
+ movw r3, #16423
+ str r3, [r4, #MXC_UART_CR2_OFFSET]
+
+ /*
+ * No parity, autobaud detect-old, rxdmuxsel=1 (fixed i.mx7)
+ * Magic value => #132
+ * MXC_UART_CR3_ADNIMP | MXC_UART_CR3_RXDMUXSEL
+ */
+ movs r3, #132
+ str r3, [r4, #MXC_UART_CR3_OFFSET]
+
+ /*
+ * Set CTS FIFO trigger to 32 bytes bits 15:10
+ * Magic value => #32768
+ * FIFO trigger bitmask 100000
+ * */
+ mov r3, #32768
+ str r3, [r4, #MXC_UART_CR4_OFFSET]
+
+ /*
+ * TX/RX-thresh = 2 bytes, DCE (bit6 = 0), refclk @24MHz / 4
+ * Magic value #2562
+ * MXC_UART_FCR_TXTL(TX_RX_THRESH) | MXC_UART_FCR_RXTL(TX_RX_THRESH) | MXC_UART_FCR_RFDIV2
+ */
+ movw r3, #2562
+ str r3, [r4, #MXC_UART_FCR_OFFSET]
+
+ /* This BIR should be set to 0x0F prior to writing the BMR */
+ movs r3, #15
+ str r3, [r4, #MXC_UART_BIR_OFFSET]
+
+ /* Hard-code to 115200 @ 24 MHz */
+ movs r0, #104
+ str r0, [r4, #MXC_UART_BMR_OFFSET]
+
+ /* Indicate success */
+ movs r0, #1
+ bx lr
+core_init_fail:
+ mov r0, #0
+ bx lr
+endfunc console_core_init
+
+ /* ---------------------------------------------
+ * int console_putc(int c)
+ * Function to output a character over the
+ * console. It returns the character printed on
+ * success or -1 on error.
+ * In : r0 - character to be printed
+ * Out : return -1 on error else return character.
+ * Clobber list : r1, r2
+ * ---------------------------------------------
+ */
+func console_putc
+ ldr r2, =console_base
+ ldr r1, [r2]
+ b console_core_putc
+endfunc console_putc
+
+ /* --------------------------------------------------------
+ * int console_core_putc(int c, uintptr_t base_addr)
+ * Function to output a character over the console. It
+ * returns the character printed on success or -1 on error.
+ * In : r0 - character to be printed
+ * r1 - console base address
+ * Out : return -1 on error else return character.
+ * Clobber list : r2, r7
+ * --------------------------------------------------------
+ */
+func console_core_putc
+ /* Check the input parameter */
+ cmp r1, #0
+ beq putc_error
+
+ /* Output specified character to UART shift-register */
+ str r0, [r1, #MXC_UART_TXD_OFFSET]
+
+ /* Wait for transmit MXC_UART_STAT2_OFFSET.MXC_UART_STAT2_TXDC == 1 */
+__putc_spin_ready:
+ ldr r7, [r1, #MXC_UART_STAT2_OFFSET]
+ ands r7, #MXC_UART_STAT2_TXDC
+ beq __putc_spin_ready
+
+ /* Transmit complete do we need to fixup \n to \n\r */
+ cmp r0, #10
+ beq __putc_fixup_lf
+
+ /* No fixup necessary - exit here */
+ movs r0, #0
+ bx lr
+
+ /* Fixup \n to \n\r */
+__putc_fixup_lf:
+ movs r0, #13
+ b console_core_putc
+putc_error:
+ mov r0, #-1
+ bx lr
+endfunc console_core_putc
+
+ /* ---------------------------------------------
+ * int console_getc(void)
+ * Function to get a character from the console.
+ * It returns the character grabbed on success
+ * or -1 on error.
+ * Out : return -1 on error else return character.
+ * Clobber list : r0, r1
+ * ---------------------------------------------
+ */
+func console_getc
+ ldr r1, =console_base
+ ldr r0, [r1]
+ b console_core_getc
+endfunc console_getc
+
+ /* ---------------------------------------------
+ * int console_core_getc(void)
+ * Function to get a character from the console.
+ * It returns the character grabbed on success
+ * or -1 on error.
+ * In : r0 - console base address
+ * Out : return -1 on error else return character.
+ * Clobber list : r0, r1
+ * ---------------------------------------------
+ */
+func console_core_getc
+ cmp r0, #0
+ beq getc_error
+1:
+ /* Check if the receive FIFO is empty */
+/* TODO */
+getc_error:
+ mov r0, #-1
+ bx lr
+endfunc console_core_getc
+
+ /* ---------------------------------------------
+ * int console_flush(void)
+ * Function to force a write of all buffered
+ * data that hasn't been output. It returns 0
+ * upon successful completion, otherwise it
+ * returns -1.
+ * Clobber list : r0, r1
+ * ---------------------------------------------
+ */
+func console_flush
+ ldr r1, =console_base
+ ldr r0, [r1]
+ b console_core_flush
+endfunc console_flush
+
+ /* ---------------------------------------------
+ * int console_core_flush(uintptr_t base_addr)
+ * Function to force a write of all buffered
+ * data that hasn't been output.
+ * In : r0 - console base address
+ * Out : return -1 on error else return 0.
+ * Clobber list : r0, r1
+ * ---------------------------------------------
+ */
+func console_core_flush
+ cmp r0, #0
+ beq flush_error
+
+1:
+ /* Loop while the transmit FIFO is busy */
+/* TODO */
+
+ mov r0, #0
+ bx lr
+flush_error:
+ mov r0, #-1
+ bx lr
+endfunc console_core_flush
diff --git a/drivers/nxp/uart/nxp_console.h b/drivers/nxp/uart/nxp_console.h
new file mode 100644
index 0000000..38f2f05
--- /dev/null
+++ b/drivers/nxp/uart/nxp_console.h
@@ -0,0 +1,155 @@
+/*
+ * Copyright (c) Linaro 2018 Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#ifndef __MXC_CONSOLE_H__
+#define __MXC_CONSOLE_H__
+
+#define BIT(x) (1 << (x))
+
+#define MXC_UART_RXD_OFFSET 0x00
+#define MXC_UART_RXD_CHARRDY BIT(15)
+#define MXC_UART_RXD_ERR BIT(14)
+#define MXC_UART_RXD_OVERRUN BIT(13)
+#define MXC_UART_RXD_FRMERR BIT(12)
+#define MXC_UART_RXD_BRK BIT(11)
+#define MXC_UART_RXD_PRERR BIT(10)
+
+#define MXC_UART_TXD_OFFSET 0x40
+
+#define MXC_UART_CR1_OFFSET 0x80
+#define MXC_UART_CR1_ADEN BIT(15)
+#define MXC_UART_CR1_ADBR BIT(14)
+#define MXC_UART_CR1_TRDYEN BIT(13)
+#define MXC_UART_CR1_IDEN BIT(12)
+#define MXC_UART_CR1_RRDYEN BIT(9)
+#define MXC_UART_CR1_RXDMAEN BIT(8)
+#define MXC_UART_CR1_IREN BIT(7)
+#define MXC_UART_CR1_TXMPTYEN BIT(6)
+#define MXC_UART_CR1_RTSDEN BIT(5)
+#define MXC_UART_CR1_SNDBRK BIT(4)
+#define MXC_UART_CR1_TXDMAEN BIT(3)
+#define MXC_UART_CR1_ATDMAEN BIT(2)
+#define MXC_UART_CR1_DOZE BIT(1)
+#define MXC_UART_CR1_UARTEN BIT(0)
+
+#define MXC_UART_CR2_OFFSET 0x84
+#define MXC_UART_CR2_ESCI BIT(15)
+#define MXC_UART_CR2_IRTS BIT(14)
+#define MXC_UART_CR2_CTSC BIT(13)
+#define MXC_UART_CR2_CTS BIT(12)
+#define MXC_UART_CR2_ESCEN BIT(11)
+#define MXC_UART_CR2_PREN BIT(8)
+#define MXC_UART_CR2_PROE BIT(7)
+#define MXC_UART_CR2_STPB BIT(6)
+#define MXC_UART_CR2_WS BIT(5)
+#define MXC_UART_CR2_RTSEN BIT(4)
+#define MXC_UART_CR2_ATEN BIT(3)
+#define MXC_UART_CR2_TXEN BIT(2)
+#define MXC_UART_CR2_RXEN BIT(1)
+#define MXC_UART_CR2_SRST BIT(0)
+
+#define MXC_UART_CR3_OFFSET 0x88
+#define MXC_UART_CR3_DTREN BIT(13)
+#define MXC_UART_CR3_PARERREN BIT(12)
+#define MXC_UART_CR3_FARERREN BIT(11)
+#define MXC_UART_CR3_DSD BIT(10)
+#define MXC_UART_CR3_DCD BIT(9)
+#define MXC_UART_CR3_RI BIT(8)
+#define MXC_UART_CR3_ADNIMP BIT(7)
+#define MXC_UART_CR3_RXDSEN BIT(6)
+#define MXC_UART_CR3_AIRINTEN BIT(5)
+#define MXC_UART_CR3_AWAKEN BIT(4)
+#define MXC_UART_CR3_DTRDEN BIT(3)
+#define MXC_UART_CR3_RXDMUXSEL BIT(2)
+#define MXC_UART_CR3_INVT BIT(1)
+#define MXC_UART_CR3_ACIEN BIT(0)
+
+#define MXC_UART_CR4_OFFSET 0x8c
+#define MXC_UART_CR4_INVR BIT(9)
+#define MXC_UART_CR4_ENIRI BIT(8)
+#define MXC_UART_CR4_WKEN BIT(7)
+#define MXC_UART_CR4_IDDMAEN BIT(6)
+#define MXC_UART_CR4_IRSC BIT(5)
+#define MXC_UART_CR4_LPBYP BIT(4)
+#define MXC_UART_CR4_TCEN BIT(3)
+#define MXC_UART_CR4_BKEN BIT(2)
+#define MXC_UART_CR4_OREN BIT(1)
+#define MXC_UART_CR4_DREN BIT(0)
+
+#define MXC_UART_FCR_OFFSET 0x90
+#define MXC_UART_FCR_TXTL_MASK (BIT(15) | BIT(14) | BIT(13) | BIT(12) |\
+ BIT(11) | BIT(10))
+#define MXC_UART_FCR_TXTL(x) (x << 10)
+#define MXC_UART_FCR_RFDIV_MASK (BIT(9) | BIT(8) | BIT(7))
+#define MXC_UART_FCR_RFDIV7 (BIT(9) | BIT(8))
+#define MXC_UART_FCR_RFDIV1 (BIT(9) | BIT(7))
+#define MXC_UART_FCR_RFDIV2 BIT(9)
+#define MXC_UART_FCR_RFDIV3 (BIT(8) | BIT(7))
+#define MXC_UART_FCR_RFDIV4 BIT(8)
+#define MXC_UART_FCR_RFDIV5 BIT(7)
+#define MXC_UART_FCR_RFDIV6 0
+#define MXC_UART_FCR_DCEDTE BIT(6)
+#define MXC_UART_FCR_RXTL_MASK (BIT(5) | BIT(4) | BIT(3) | BIT(2) |\
+ BIT(1) | BIT(0))
+#define MXC_UART_FCR_RXTL(x) x
+
+#define MXC_UART_STAT1_OFFSET 0x94
+#define MXC_UART_STAT1_PARITYERR BIT(15)
+#define MXC_UART_STAT1_RTSS BIT(14)
+#define MXC_UART_STAT1_TRDY BIT(13)
+#define MXC_UART_STAT1_RTSD BIT(12)
+#define MXC_UART_STAT1_ESCF BIT(11)
+#define MXC_UART_STAT1_FRAMEERR BIT(10)
+#define MXC_UART_STAT1_RRDY BIT(9)
+#define MXC_UART_STAT1_AGTIM BIT(8)
+#define MXC_UART_STAT1_DTRD BIT(7)
+#define MXC_UART_STAT1_RXDS BIT(6)
+#define MXC_UART_STAT1_AIRINT BIT(5)
+#define MXC_UART_STAT1_AWAKE BIT(4)
+#define MXC_UART_STAT1_SAD BIT(3)
+
+#define MXC_UART_STAT2_OFFSET 0x98
+#define MXC_UART_STAT2_ADET BIT(15)
+#define MXC_UART_STAT2_TXFE BIT(14)
+#define MXC_UART_STAT2_DTRF BIT(13)
+#define MXC_UART_STAT2_IDLE BIT(12)
+#define MXC_UART_STAT2_ACST BIT(11)
+#define MXC_UART_STAT2_RIDELT BIT(10)
+#define MXC_UART_STAT2_RIIN BIT(9)
+#define MXC_UART_STAT2_IRINT BIT(8)
+#define MXC_UART_STAT2_WAKE BIT(7)
+#define MXC_UART_STAT2_DCDDELT BIT(6)
+#define MXC_UART_STAT2_DCDIN BIT(5)
+#define MXC_UART_STAT2_RTSF BIT(4)
+#define MXC_UART_STAT2_TXDC BIT(3)
+#define MXC_UART_STAT2_BRCD BIT(2)
+#define MXC_UART_STAT2_ORE BIT(1)
+#define MXC_UART_STAT2_RCR BIT(0)
+
+#define MXC_UART_ESC_OFFSET 0x9c
+
+#define MXC_UART_TIM_OFFSET 0xa0
+
+#define MXC_UART_BIR_OFFSET 0xa4
+
+#define MXC_UART_BMR_OFFSET 0xa8
+
+#define MXC_UART_BRC_OFFSET 0xac
+
+#define MXC_UART_ONEMS_OFFSET 0xb0
+
+#define MXC_UART_TS_OFFSET 0xb4
+#define MXC_UART_TS_FRCPERR BIT(13)
+#define MXC_UART_TS_LOOP BIT(12)
+#define MXC_UART_TS_DBGEN BIT(11)
+#define MXC_UART_TS_LOOPIR BIT(10)
+#define MXC_UART_TS_RXDBG BIT(9)
+#define MXC_UART_TS_TXEMPTY BIT(6)
+#define MXC_UART_TS_RXEMPTY BIT(5)
+#define MXC_UART_TS_TXFULL BIT(4)
+#define MXC_UART_TS_RXFULL BIT(3)
+#define MXC_UART_TS_SOFTRST BIT(0)
+
+#endif /* __MXC_CONSOLE_H__ */