diff options
| author | Jun Nie <jun.nie@linaro.org> | 2018-08-21 09:57:11 +0800 |
|---|---|---|
| committer | Jun Nie <jun.nie@linaro.org> | 2018-08-21 15:37:33 +0800 |
| commit | d9f545d481a2572e021ba3b1166418a1571e4d11 (patch) | |
| tree | 836e2c2d8227eae736ed6d9f2acd90bc4d8576b5 | |
| parent | 1100fab3264844387fa2f3074c957242a0fe63fb (diff) | |
Aarch32: Support non-HYP suspend
Skip hypervisor related system control registers manipulation and
operate on non-HYP version registers to support CPU suspend that
does not support hypervisor feature.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
| -rw-r--r-- | lib/power_management/suspend/aarch32/asm_tftf_suspend.S | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/lib/power_management/suspend/aarch32/asm_tftf_suspend.S b/lib/power_management/suspend/aarch32/asm_tftf_suspend.S index 5405bfa..3daa0cd 100644 --- a/lib/power_management/suspend/aarch32/asm_tftf_suspend.S +++ b/lib/power_management/suspend/aarch32/asm_tftf_suspend.S @@ -68,6 +68,12 @@ func __tftf_suspend endfunc __tftf_suspend func __tftf_save_arch_context + /* check hypervisor mode support status */ + mrs r2, cpsr + and r1, r2, #0x1f @ mask mode bits + teq r1, #0x1a @ test for HYP mode + bne non_hyp_save_ctx + ldcopr r1, HMAIR0 ldcopr r2, HCR stm r0!, {r1, r2} @@ -76,6 +82,15 @@ func __tftf_save_arch_context ldcopr r1, HTCR ldcopr r2, HVBAR ldcopr r3, HSCTLR + b save_ctx_exit + +non_hyp_save_ctx: + ldcopr r1, MAIR0 + stm r0!, {r1, r2} + ldcopr r2, VBAR + ldcopr r3, SCTLR + +save_ctx_exit: stm r0, {r1, r2, r3} bx lr endfunc __tftf_save_arch_context @@ -85,6 +100,12 @@ endfunc __tftf_save_arch_context * r0 -- Should contain the context pointer */ func __tftf_cpu_resume_ep + /* check hypervisor mode support status */ + mrs r2, cpsr + and r1, r2, #0x1f @ mask mode bits + teq r1, #0x1a @ test for HYP mode + bne non_hyp_resume_ep + /* Invalidate local tlb entries before turning on MMU */ stcopr r0, TLBIALLH mov r4, r0 @@ -96,12 +117,28 @@ func __tftf_cpu_resume_ep ldm r0, {r1, r2, r3} stcopr r1, HTCR stcopr r2, HVBAR - /* * TLB invalidations need to be completed before enabling MMU */ dsb nsh stcopr r3, HSCTLR + b resume_ep_exit + +non_hyp_resume_ep: + /* Invalidate local tlb entries before turning on MMU */ + stcopr r0, TLBIALL + mov r4, r0 + ldm r0!, {r1, r2} + stcopr r1, MAIR0 + ldm r0, {r1, r2, r3} + stcopr r2, VBAR + /* + * TLB invalidations need to be completed before enabling MMU + */ + dsb nsh + stcopr r3, SCTLR + +resume_ep_exit: /* Ensure the MMU enable takes effect immediately */ isb |