Add some new accessors in the GIC driver

Add accessors to:
 - clear a bit in the GICD_ITARGETSR register.
 - set a bit in the GICD_ICENABLER register.

Change-Id: I05e8e919c37546aaa087c1395b9e3b468866cc2c

1 files changed, 23 insertions, 0 deletions

diff --git a/drivers/arm/gic/gic_v2.c b/drivers/arm/gic/gic_v2.c
index 29d9bf3..ff8ffc7 100644
--- a/drivers/arm/gic/gic_v2.c
+++ b/drivers/arm/gic/gic_v2.c
@@ -244,6 +244,17 @@ void gicd_set_itargetsr(unsigned int base,
 	gicd_write_itargetsr(base, interrupt_id, reg_val |
 			     (1 << iface) << (byte_off << 3));
 }
+
+void gicd_clear_itargetsr(unsigned int base,
+			  unsigned int interrupt_id, unsigned int iface)
+{
+	unsigned byte_off = interrupt_id & ((1 << ITARGETSR_SHIFT) - 1);
+	unsigned int reg_val = gicd_read_itargetsr(base, interrupt_id);
+
+	gicd_write_itargetsr(base, interrupt_id,
+			     reg_val & ~(1 << iface) << (byte_off << 3));
+}
+
 /*******************************************************************************
  * Enable NS interrupts and disable legacy bypass and set the priority mask
  * register to allow all interrupts to trickle in.
@@ -318,12 +329,24 @@ void arm_gicd_set_itargetsr(unsigned int num, unsigned int linear_id)
 	gicd_set_itargetsr(gicd_base_addr, num, linear_id);
 }
 
+void arm_gicd_clear_itargetsr(unsigned int num, unsigned int linear_id)
+{
+	assert(gicd_base_addr);
+	gicd_clear_itargetsr(gicd_base_addr, num, linear_id);
+}
+
 void arm_gicd_set_isenabler(unsigned int num)
 {
 	assert(gicd_base_addr);
 	gicd_set_isenabler(gicd_base_addr, num);
 }
 
+void arm_gicd_set_icenabler(unsigned int num)
+{
+	assert(gicd_base_addr);
+	gicd_set_icenabler(gicd_base_addr, num);
+}
+
 uint32_t arm_gicc_read_iar(void)
 {
 	assert(gicc_base_addr);