gic: Introduce arm_gic_intr_enabled()

This helper is needed to perform save/restore of the interrupt
line context as part of the SDEI library.

Change-Id: I0c1382fb402f49ae7ec453c6506030460a20efbd
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>

5 files changed, 50 insertions, 0 deletions

diff --git a/drivers/arm/gic/arm_gic_v2.c b/drivers/arm/gic/arm_gic_v2.c
index 6f1e718..da3c9f8 100644
--- a/drivers/arm/gic/arm_gic_v2.c
+++ b/drivers/arm/gic/arm_gic_v2.c
@@ -97,6 +97,11 @@ void arm_gic_set_intr_target(unsigned int num, unsigned int core_pos)
 	gicv2_set_itargetsr(num, core_pos);
 }
 
+unsigned int arm_gic_intr_enabled(unsigned int num)
+{
+	return gicv2_gicd_get_isenabler(num) != 0;
+}
+
 void arm_gic_intr_enable(unsigned int num)
 {
 	gicv2_gicd_set_isenabler(num);
diff --git a/drivers/arm/gic/arm_gic_v2v3.c b/drivers/arm/gic/arm_gic_v2v3.c
index 34e185f..b6d77f0 100644
--- a/drivers/arm/gic/arm_gic_v2v3.c
+++ b/drivers/arm/gic/arm_gic_v2v3.c
@@ -142,6 +142,14 @@ void arm_gic_set_intr_target(unsigned int num, unsigned int core_pos)
 		gicv2_set_itargetsr(num, core_pos);
 }
 
+unsigned int arm_gic_intr_enabled(unsigned int num)
+{
+	if (gicv3_detected)
+		return gicv3_get_isenabler(num) != 0;
+	else
+		return gicv2_gicd_get_isenabler(num) != 0;
+}
+
 void arm_gic_intr_enable(unsigned int num)
 {
 	if (gicv3_detected)
diff --git a/drivers/arm/gic/gic_common.c b/drivers/arm/gic/gic_common.c
index 80b7796..ae0c781 100644
--- a/drivers/arm/gic/gic_common.c
+++ b/drivers/arm/gic/gic_common.c
@@ -150,6 +150,13 @@ void gicd_write_icfgr(unsigned int base,
 /*******************************************************************************
  * GIC Distributor interface accessors for individual interrupt manipulation
  ******************************************************************************/
+unsigned int gicd_get_isenabler(unsigned int base, unsigned int interrupt_id)
+{
+	unsigned int bit_num = interrupt_id & ((1 << ISENABLER_SHIFT) - 1);
+
+	return gicd_read_isenabler(base, interrupt_id) & (1 << bit_num);
+}
+
 void gicd_set_isenabler(unsigned int base, unsigned int interrupt_id)
 {
 	unsigned int bit_num = interrupt_id & ((1 << ISENABLER_SHIFT) - 1);
diff --git a/drivers/arm/gic/gic_v2.c b/drivers/arm/gic/gic_v2.c
index 38155be..7097ecf 100644
--- a/drivers/arm/gic/gic_v2.c
+++ b/drivers/arm/gic/gic_v2.c
@@ -298,6 +298,14 @@ void gicv2_set_itargetsr_value(unsigned int num, unsigned int val)
 	gicd_write_itargetsr_byte(gicd_base_addr, num, val);
 }
 
+unsigned int gicv2_gicd_get_isenabler(unsigned int num)
+{
+	assert(gicd_base_addr);
+	assert(IS_VALID_INTR_ID(num));
+
+	return gicd_get_isenabler(gicd_base_addr, num);
+}
+
 void gicv2_gicd_set_isenabler(unsigned int num)
 {
 	assert(gicd_base_addr);
diff --git a/drivers/arm/gic/gic_v3.c b/drivers/arm/gic/gic_v3.c
index 9cd1d62..9e9ae40 100644
--- a/drivers/arm/gic/gic_v3.c
+++ b/drivers/arm/gic/gic_v3.c
@@ -151,6 +151,13 @@ static unsigned int gicr_read_ispendr0(unsigned int base)
  * GIC Re-distributor interface accessors for individual interrupt
  * manipulation
  *****************************************************************************/
+static unsigned int gicr_get_isenabler0(unsigned int base,
+	unsigned int interrupt_id)
+{
+	unsigned bit_num = interrupt_id & ((1 << ISENABLER_SHIFT) - 1);
+	return gicr_read_isenabler0(base) & (1 << bit_num);
+}
+
 static void gicr_set_isenabler0(unsigned int base, unsigned int interrupt_id)
 {
 	unsigned bit_num = interrupt_id & ((1 << ISENABLER_SHIFT) - 1);
@@ -374,6 +381,21 @@ void gicv3_set_intr_route(unsigned int interrupt_id,
 	gicd_write_irouter(gicd_base_addr, interrupt_id, route_affinity);
 }
 
+unsigned int gicv3_get_isenabler(unsigned int interrupt_id)
+{
+	unsigned int core_pos;
+
+	assert(gicd_base_addr);
+	assert(IS_VALID_INTR_ID(interrupt_id));
+
+	if (interrupt_id < MIN_SPI_ID) {
+		core_pos = platform_get_core_pos(read_mpidr_el1());
+		assert(rdist_pcpu_base[core_pos]);
+		return gicr_get_isenabler0(rdist_pcpu_base[core_pos], interrupt_id);
+	} else
+		return gicd_get_isenabler(gicd_base_addr, interrupt_id);
+}
+
 void gicv3_set_isenabler(unsigned int interrupt_id)
 {
 	unsigned int core_pos;