FWU: Add FWU Normal image(NS_BL2U) support to TFTF.

The Firmware Update(FWU) feature provides the capability
to upgrade a complete global SoC firmware image from an
external interface to SoC NVM memories such as NOR Flash.

In order to carry on the above tasks both Normal and
Secure world FWU images co-operate with each other and
complete the Firmware Update process.

This patch adds support for FWU Normal image(NS_BL2U)
to the TFTF code base.

The task carried out by NS_BL2U is to update original FIP
using the backup FIP located at a given address.

Change-Id: Icf8243513a15cebfd15f5cb82cead263f3209240

4 files changed, 320 insertions, 0 deletions

diff --git a/fwu/ns_bl2u/aarch64/ns_bl2u_entrypoint.S b/fwu/ns_bl2u/aarch64/ns_bl2u_entrypoint.S
new file mode 100644
index 0000000..c53df44
--- /dev/null
+++ b/fwu/ns_bl2u/aarch64/ns_bl2u_entrypoint.S
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#include <tftf.h>
+
+
+	.globl	ns_bl2u_entrypoint
+
+func ns_bl2u_entrypoint
+	/* --------------------------
+	 * Set the exception vectors
+	 * --------------------------
+	 */
+	adr	x0, tftf_vector
+	asm_write_vbar_el1_or_el2 x1
+
+	/* --------------------------------------------------------------------
+	 * Enable the instruction cache, stack pointer and data access
+	 * alignment checks
+	 * --------------------------------------------------------------------
+	 */
+	mov	x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
+	asm_read_sctlr_el1_or_el2
+	orr	x0, x0, x1
+	asm_write_sctlr_el1_or_el2 x1
+	isb
+
+	/* ---------------------------------------------
+	 * Zero out the .bss section.
+	 * ---------------------------------------------
+	 */
+	ldr	x0, =__BSS_START__
+	ldr	x1, =__BSS_SIZE__
+	bl	zeromem16
+
+	/* --------------------------------------------
+	 * Allocate a stack whose memory will be marked
+	 * as Normal-IS-WBWA when the MMU is enabled.
+	 * There is no risk of reading stale stack
+	 * memory after enabling the MMU as only the
+	 * primary cpu is running at the moment.
+	 * --------------------------------------------
+	 */
+	mrs	x0, mpidr_el1
+	bl	platform_set_stack
+
+
+	/* ---------------------------------------------
+	* Perform early platform setup & platform
+	* specific early arch. setup e.g. mmu setup
+	* ---------------------------------------------
+	*/
+	bl	tftf_early_platform_setup
+	bl	tftf_plat_arch_setup
+
+	/* ---------------------------------------------
+	 * Jump to main function.
+	 * ---------------------------------------------
+	 */
+	bl	ns_bl2u_main
+dead:
+	b	dead
+endfunc ns_bl2u_entrypoint
+
diff --git a/fwu/ns_bl2u/ns_bl2u.ld.S b/fwu/ns_bl2u/ns_bl2u.ld.S
new file mode 100644
index 0000000..a45c418
--- /dev/null
+++ b/fwu/ns_bl2u/ns_bl2u.ld.S
@@ -0,0 +1,108 @@
+/*
+ * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <platform_def.h>
+
+OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
+OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
+ENTRY(ns_bl2u_entrypoint)
+
+MEMORY {
+    RAM (rwx): ORIGIN = NS_BL2U_BASE, LENGTH = NS_BL2U_LIMIT - NS_BL2U_BASE
+}
+
+SECTIONS
+{
+    . = NS_BL2U_BASE;
+    ASSERT(. == ALIGN(4096),
+           "NS_BL2U_BASE address is not aligned on a page boundary.")
+
+    ro . : {
+        __RO_START__ = .;
+        *ns_bl2u_entrypoint.o(.text*)
+        *(.text*)
+        *(.rodata*)
+        *(.vectors)
+        __RO_END_UNALIGNED__ = .;
+        /*
+         * Memory page(s) mapped to this section will be marked as
+         * read-only, executable.  No RW data from the next section must
+         * creep in.  Ensure the rest of the current memory page is unused.
+         */
+        . = NEXT(4096);    /* Aligned to the size of a 4KB */
+        __RO_END__ = .;
+    } >RAM
+	__RO_SIZE__ = __RO_END__ - __RO_START__;
+
+    .data . : {
+        __DATA_START__ = .;
+        *(.data*)
+        __DATA_END__ = .;
+    } >RAM
+
+    stacks (NOLOAD) : {
+        __STACKS_START__ = .;
+        *(ns_bl_normal_stacks)
+        __STACKS_END__ = .;
+    } >RAM
+
+    /*
+     * The .bss section gets initialised to 0 at runtime.
+     * Its base address must be 16-byte aligned.
+     */
+    .bss : ALIGN(16) {
+        __BSS_START__ = .;
+        *(SORT_BY_ALIGNMENT(.bss*))
+        *(COMMON)
+        __BSS_END__ = .;
+    } >RAM
+
+    /*
+     * The xlat_table section is for full, aligned page tables (4K).
+     * Removing them from .bss avoids forcing 4K alignment on
+     * the .bss section and eliminates the unecessary zero init
+     */
+    xlat_table (NOLOAD) : {
+        *(xlat_table)
+    } >RAM
+
+	/*
+	 * This is to avoid TFTF configuring
+	 * coherent memory for FWU BL images.
+	 */
+	__COHERENT_RAM_START__ = 0x0;
+	__COHERENT_RAM_END__ = 0x0;
+
+    __NS_BL2U_END__ = .;
+
+    __BSS_SIZE__ = SIZEOF(.bss);
+
+    ASSERT(. <= NS_BL2U_LIMIT, "NS_BL2U image has exceeded its limit.")
+}
diff --git a/fwu/ns_bl2u/ns_bl2u.mk b/fwu/ns_bl2u/ns_bl2u.mk
new file mode 100644
index 0000000..dfbddfd
--- /dev/null
+++ b/fwu/ns_bl2u/ns_bl2u.mk
@@ -0,0 +1,56 @@
+#
+# Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# Redistributions of source code must retain the above copyright notice, this
+# list of conditions and the following disclaimer.
+#
+# Redistributions in binary form must reproduce the above copyright notice,
+# this list of conditions and the following disclaimer in the documentation
+# and/or other materials provided with the distribution.
+#
+# Neither the name of ARM nor the names of its contributors may be used
+# to endorse or promote products derived from this software without specific
+# prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+NS_BL2U_SOURCES	+=	framework/aarch64/arch.c			\
+			framework/aarch64/asm_platform_weak.S		\
+			framework/aarch64/exceptions.S			\
+			framework/debug.c				\
+			fwu/ns_bl2u/aarch64/ns_bl2u_entrypoint.S	\
+			fwu/ns_bl2u/ns_bl2u_main.c			\
+			lib/aarch64/cache_helpers.S			\
+			lib/aarch64/misc_helpers.S			\
+			lib/aarch64/xlat_helpers.c			\
+			lib/aarch64/xlat_tables.c			\
+			lib/locks/spinlock.S				\
+			lib/smc/asm_smc.S				\
+			lib/smc/smc.c					\
+			lib/stdlib/std.c				\
+			lib/utils/mp_printf.c				\
+			lib/utils/uuid.c				\
+			plat/common/aarch64/plat_common.c		\
+			plat/common/aarch64/platform_helpers.S		\
+			plat/common/aarch64/platform_up_stack.S 	\
+			plat/common/arm_io_storage.c			\
+			plat/common/fwu_nvm_accessors.c			\
+			drivers/io/io_memmap.c				\
+			drivers/io/io_fip.c
+
+NS_BL2U_LINKERFILE	:=	fwu/ns_bl2u/ns_bl2u.ld.S
+
diff --git a/fwu/ns_bl2u/ns_bl2u_main.c b/fwu/ns_bl2u/ns_bl2u_main.c
new file mode 100644
index 0000000..745f789
--- /dev/null
+++ b/fwu/ns_bl2u/ns_bl2u_main.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <arch_helpers.h>
+#include <debug.h>
+#include <firmware_image_package.h>
+#include <fwu_nvm.h>
+#include <platform.h>
+#include <platform_def.h>
+
+extern const char version_string[];
+
+void ns_bl2u_main(void)
+{
+	smc64_args fwu_params = {0};
+	smc64_ret_values fwu_result = {0};
+
+	NOTICE("NS_BL2U: %s\n", version_string);
+	NOTICE("NS_BL2U: %s\n", build_message);
+
+	tftf_platform_setup();
+
+	/* Update the FIP image. */
+	if (fwu_update_fip(FIP_BKP_ADDRESS) != STATUS_SUCCESS) {
+		ERROR("NS_BL2U: Firmware Image Update Failed\n");
+		panic();
+	}
+
+	/* Call FWU_SMC_UPDATE_DONE to indicate image update done. */
+	INFO("NS_BL2U: Calling FWU_SMC_UPDATE_DONE\n");
+	fwu_params.arg0 = FWU_SMC_UPDATE_DONE;
+	fwu_result = tftf_smc64(&fwu_params);
+	ERROR("NS_BL2U: Unexpected return from FWU process (%d)\n",
+			(int)fwu_result.ret0);
+	panic();
+}