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authorSoby Mathew <soby.mathew@arm.com>2015-11-02 10:56:26 +0000
committerSoby Mathew <soby.mathew@arm.com>2016-02-04 16:59:18 +0000
commitb122cb138c83402a1a5f1b9b04c41bf48ff7cae9 (patch)
tree1b268ab206a73d8f1644e0e374059944deac7982 /lib/power_management/hotplug
parent6c89ade9b2251c81a06759ca3189c8c9e70d0588 (diff)
Introduce the ARM GIC layer and refactor GICv2 driver
The TFTF assumed that the GIC driver architecture is v2.0 and made inherent assumptions about the same in the framework. In order to add support for GICv3 systems, this assumption needs to be removed and a new ARM GIC layer is introduced which abstracts the GIC Architecture details. The `arm_gic.c` and `arm_gic.h` contain the prototypes and definitions for this new layer. Also the GICv2 driver is refactored such that all the functionality is contained within the driver and the driver is accessed through well defined API. This essentially means that the GICv2 specific functionality present earlier in the interrupt framework and SGI framework is now removed. Also certain functionality of GICv2 like clearing the interrupt target register (GICD_ITARGETSR) to leave an interrupt untargeted cannot be supported generically in GICv3 and hence it is removed. The timer framework, which made use of this feature, is modified to not use it anymore. All the framework and testcases are modified to use the ARM GIC layer rather than the GICv2 driver directly. The functionality common across GICv3 and GICv2 drivers are defined in gic_common.c. Change-Id: Idf50fa14be42cb4dfb507087e340b0404e681e98
Diffstat (limited to 'lib/power_management/hotplug')
-rw-r--r--lib/power_management/hotplug/hotplug.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/lib/power_management/hotplug/hotplug.c b/lib/power_management/hotplug/hotplug.c
index 570083f..7c5be95 100644
--- a/lib/power_management/hotplug/hotplug.c
+++ b/lib/power_management/hotplug/hotplug.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -33,7 +33,6 @@
#include <assert.h>
#include <cdefs.h> /* For __dead2 */
#include <debug.h>
-#include <gic_v2.h>
#include <irq.h>
#include <platform.h>
#include <platform_def.h>
@@ -149,6 +148,11 @@ unsigned int tftf_is_cpu_online(unsigned int mpid)
return ACCESS(cpus_status_map[core_pos].state) == TFTF_AFFINITY_STATE_ON;
}
+unsigned int tftf_is_core_pos_online(unsigned int core_pos)
+{
+ return ACCESS(cpus_status_map[core_pos].state) == TFTF_AFFINITY_STATE_ON;
+}
+
int32_t tftf_cpu_on(uint64_t target_cpu,
uint64_t entrypoint,
uint64_t context_id)
@@ -244,7 +248,7 @@ static void tftf_prepare_cpu_off(void)
*/
disable_irq();
isb();
- arm_gic_cpuif_deactivate();
+ arm_gic_disable_interrupts_local();
}
/*
@@ -252,7 +256,7 @@ static void tftf_prepare_cpu_off(void)
*/
static void tftf_revert_cpu_off(void)
{
- arm_gic_cpuif_enable_interrupts();
+ arm_gic_enable_interrupts_local();
enable_irq();
isb();
}
@@ -295,8 +299,7 @@ void __dead2 tftf_warm_boot_main(void)
{
/* Initialise the CPU */
tftf_arch_setup();
- tftf_register_gic_id();
- arm_gic_cpuif_setup();
+ arm_gic_setup_local();
/* Enable the SGI used by the timer management framework */
tftf_irq_enable(IRQ_WAKE_SGI, GIC_HIGHEST_NS_PRIORITY);