Introduce the ARM GIC layer and refactor GICv2 driver

The TFTF assumed that the GIC driver architecture is v2.0 and made
inherent assumptions about the same in the framework. In order to
add support for GICv3 systems, this assumption needs to be removed
and a new ARM GIC layer is introduced which abstracts the GIC
Architecture details. The `arm_gic.c` and `arm_gic.h` contain the
prototypes and definitions for this new layer. Also the GICv2
driver is refactored such that all the functionality is contained
within the driver and the driver is accessed through well defined
API. This essentially means that the GICv2 specific functionality
present earlier in the interrupt framework and SGI framework is
now removed.

Also certain functionality of GICv2 like clearing the
interrupt target register (GICD_ITARGETSR) to leave an interrupt
untargeted cannot be supported generically in GICv3 and hence it is
removed. The timer framework, which made use of this feature, is
modified to not use it anymore.

All the framework and testcases are modified to use the ARM GIC
layer rather than the GICv2 driver directly. The functionality
common across GICv3 and GICv2 drivers are defined in gic_common.c.

Change-Id: Idf50fa14be42cb4dfb507087e340b0404e681e98

2 files changed, 16 insertions, 15 deletions

diff --git a/lib/power_management/hotplug/hotplug.c b/lib/power_management/hotplug/hotplug.c
index 570083f..7c5be95 100644
--- a/lib/power_management/hotplug/hotplug.c
+++ b/lib/power_management/hotplug/hotplug.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -33,7 +33,6 @@
 #include <assert.h>
 #include <cdefs.h>		/* For __dead2 */
 #include <debug.h>
-#include <gic_v2.h>
 #include <irq.h>
 #include <platform.h>
 #include <platform_def.h>
@@ -149,6 +148,11 @@ unsigned int tftf_is_cpu_online(unsigned int mpid)
 	return ACCESS(cpus_status_map[core_pos].state) == TFTF_AFFINITY_STATE_ON;
 }
 
+unsigned int tftf_is_core_pos_online(unsigned int core_pos)
+{
+	return ACCESS(cpus_status_map[core_pos].state) == TFTF_AFFINITY_STATE_ON;
+}
+
 int32_t tftf_cpu_on(uint64_t	target_cpu,
 		    uint64_t	entrypoint,
 		    uint64_t	context_id)
@@ -244,7 +248,7 @@ static void tftf_prepare_cpu_off(void)
 	 */
 	disable_irq();
 	isb();
-	arm_gic_cpuif_deactivate();
+	arm_gic_disable_interrupts_local();
 }
 
 /*
@@ -252,7 +256,7 @@ static void tftf_prepare_cpu_off(void)
  */
 static void tftf_revert_cpu_off(void)
 {
-	arm_gic_cpuif_enable_interrupts();
+	arm_gic_enable_interrupts_local();
 	enable_irq();
 	isb();
 }
@@ -295,8 +299,7 @@ void __dead2 tftf_warm_boot_main(void)
 {
 	/* Initialise the CPU */
 	tftf_arch_setup();
-	tftf_register_gic_id();
-	arm_gic_cpuif_setup();
+	arm_gic_setup_local();
 
 	/* Enable the SGI used by the timer management framework */
 	tftf_irq_enable(IRQ_WAKE_SGI, GIC_HIGHEST_NS_PRIORITY);
diff --git a/lib/power_management/suspend/tftf_suspend.c b/lib/power_management/suspend/tftf_suspend.c
index ae607f8..1c1a216 100644
--- a/lib/power_management/suspend/tftf_suspend.c
+++ b/lib/power_management/suspend/tftf_suspend.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2014-2016, ARM Limited. All rights reserved.
 *
 *  This program and the accompanying materials
 *  are licensed and made available under the terms and conditions of the BSD License
@@ -86,7 +86,7 @@ void tftf_restore_system_ctx(tftf_suspend_ctx_t *ctx)
 
 	INFO("Restoring system context\n");
 
-	arm_gic_setup();
+	arm_gic_setup_global();
 	tftf_sgi_state_restore();
 	tftf_timer_gic_state_restore();
 }
@@ -111,13 +111,11 @@ int tftf_suspend(const suspend_info_t *info)
 
 	rc = __tftf_suspend(info);
 
-	if (!info->save_system_context) {
-		/*
-		 * HACK: ARM TF is disabling Group 1 interrupts while
-		 * entering suspend but does not restore it
-		 */
-		arm_gic_cpuif_setup();
-	}
+	/*
+	 * HACK: ARM TF is disabling Group 1 interrupts while
+	 * entering suspend but does not restore it
+	 */
+	arm_gic_setup_local();
 
 	/*
 	 * DAIF flags should be restored last because it could be an issue