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Skip PSCI Affinity test as there is only one CPU core in SOC.
This test also cause test suite to exit.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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register nxp timer as platform timer to provide timeout interrupt service.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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add arch version flag in makefile so that this build flag
can be detected when building code.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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Correct system counter register address. So that framework can
call it directly to get latest counter value.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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The mpid value get from tftf_plat_get_mpidr() should be
aligned with read_mpidr_el1(), so that below test is true
for lead core.
(read_mpidr_el1() & MPID_MASK) == mpid
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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change tftf load address to ease test. The original address
is for optee. TFTF should play u-boot's role for test actually.
But for ease of test, we use u-boot to load it, as below boot
sequence of ATF -> optee -> u-boot -> tftf.
The command in u-boot console to boot tftf:
fatload mmc 0:1 0x9e000000 tftf.bin; go 0x9e000000
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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add irq stack size definition so that Aarch32 framework
can use it to define the stack in IRQ mode.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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Add stack for IRQ mode for ARMv7. Otherwise, stack operation in
IRQ mode result data abort due to data access to random address.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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Add tests list to skip for warp7. More will be added later
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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Add build config file to specify source code for compiling
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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Add power state and domain topology for warp7
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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register timer for warp7 to provide timer callback for
framework.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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Add basic platform setup code, include console and GIC
initilization.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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Add plat helpers function, platform_get_core_pos(). This
function is called in framework so we need implement it
though warp7 only have one CPU core.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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Add platform definition header, which defines all warp7
related configurations.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
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The current version of plat_get_core_pos uses an incorrect algorithm
to calculate the linear position of a core / PE from its MPIDR.
This patch corrects the algorithm to:
(ClusterId * FVP_MAX_CPUS_PER_CLUSTER) * FVP_MAX_PE_PER_CPU
+ (CPUId * FVP_MAX_PE_PER_CPU)
+ ThreadId
Change-Id: Ida862a99a74c2a7f85b813ba270404224aa78987
Signed-off-by: David Cunado <david.cunado@arm.com>
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Move the SPM legacy tests based on MM_COMMUNICATE calls into their own
sub-directory. Take them out of the default tests manifest. To compile
a TFTF binary that includes these tests, one must now explicitly use
the SPM legacy test manifest:
> make TESTS_FILE=tests/tests-spm-legacy.xml
This paves the way to future patches that will add support for
different flavours of Cactus.
Change-Id: I4ac2b7d0ce772c005205fee1526ebe9a10e56a9b
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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Split tests-common.xml in several individual tests manifests that
focus on one feature to test.
This has 2 advantages.
1. It is easier to maintain small tests manifests rather than a
single, big one that contains all tests and keeps growing and
growing over time.
2. It is now possible to run tests in isolation, e.g. only SDEI tests
by selecting the SDEI tests manifest.
This patch also includes the "Performance" tests in the common tests.
Change-Id: I9b722bcb1658740476605be5157825a9e160bcbf
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Commit 3ef07dcf8b1c ("Disable PSCI system suspend tests on AArch32 Juno.")
has missed some PSCI system suspend tests that are part of the
tests-extensive.xml test manifest.
Change-Id: If413b275d149ee2e4f52437f6c395d85df818d9c
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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PSCI system suspend is not supported on AArch32 Juno.
Change-Id: I62c7182735097204ebb1ac8675dd48aa3859f8b5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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The UINTN type was meant to represent a 'native' integer, i.e. a 32-bit
integer on 32-bit platforms and a 64-bit integer on 64-bit platforms.
The type has been removed because it was used inconsistently across the
codebase.
Change-Id: Id45afde5c110ae807ce8fbbaa1cc48cff61ff76d
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This patch add a strong implementation of platform_get_core_pos
that supports CPUs that are multi-threaded. It checks the MT
field of the MPIDR value and shifts the affinities accordingly
so that the correect PE index is provided.
NOTE the code has hardcoded the number of PEs per CPU as 1 but
this may change when truly multi-threaded CPUs are made available.
Change-Id: I18174a65e9e089848943310b63fee916362cad13
Signed-off-by: David Cunado <david.cunado@arm.com>
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This size is the same for Juno and FVP and it is defined in TF
include/plat/arm/common/arm_def.h, but TFTF had different values
for them.
Change-Id: I979518ca2c2398de6b3bdf9d2844db0c9fa05160
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Add support for the first fast secure service in Cactus: the timer
sleep secure service, which allows a caller to request Cactus to
sleep for a certain amount of time.
Change-Id: I85263d33ca570ef08ecc51164ba89d288d1a2cbc
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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The MM_COMMUNICATE SMC interface supports passing a communication
buffer for additional payload data from normal world to the secure
partition. This commit adds support to use it.
On the TFTF side, the memory mappings have been changed to map this
memory buffer area. This allows TFTF tests to fill in this buffer to
pass data associated to secure service requests. The number of
translation tables had to be increased to map this new memory region.
On Cactus' side, the secure services loop has been modified to read
the communication buffer for MM_COMMUNICATE messages.
A common data structure has been defined, that corresponds to the
type of information that TFTF and Cactus will exchange through
MM_COMMUNICATE messages. The structure might evolve in the future
as we get a better idea of the kind of data that need to be passed
for secure services requests.
The existing MM_COMMUNICATE tests in TFTF have been modified to
pass a valid communication buffer address with a dummy ID.
Change-Id: I2df80a3e64f77eb229783802201a01008d3f9c2f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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This patch fixes and adds some comments around the system timer
definitions. It also removes the definitions related to CNTNSAR
and CNTACR, as they were not used in TFTF.
Change-Id: Idffcb614c2125c0f8edd2a4359d66cb374de8a72
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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This test verifies that spurious interrupts are handled correctly in
platforms with GICv2.
Test enabled for Juno only.
Change-Id: I34051d4820574286dfd026d0cf9cc264075636c8
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Change-Id: I57521f4b7ef6bcbb0f7bb325158db73a21478bb5
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
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This patch adds System power domain level support for the FVP platform. This
change is a non compatible change for tests running against older firmware
for FVP platforms which do not implement SYSTEM power domain.
Change-Id: Iaf986c95c02554443dd80349d770d9ea5ca83bfb
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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Make the tests work with the new check for overlaps added to the Trusted
Firmware code.
Change-Id: I5bf9818042e6a186166e979c77b49d62d222cb5d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Copied Trusted Firmware drivers of the plat crash console. This console
is initialized when the system crashes and it needs to output text.
This is a weak implementation that can be overriden by platforms.
Change-Id: I040b2727e64864a855b8563f1ece95f78432d1c4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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In a similar way as the Trusted Firmware, this option controls the
inclusion of asserts (and associated helper code). It defaults to
1 in debug builds and to 0 in release builds.
Change-Id: Ic95bb9c0ef4f80acbb54dc954a8cb2c58760fe2d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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Change-Id: Ice09a70a7543ffebbd2cf8c8bed8f96daa25c801
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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With A53_0 as the primary CPU and TFTF in release mode,
basic test cases are passing. Including powering off/on
the other CPU. Following are open issues:
* TFTF hangs in DEBUG mode, while testing System suspend cases.
* TFTF is not able to initialize NVM, so currently TFTF is
compiled with USE_NVM=0
Change-Id: I84ec23a32fff1b51a360ef6b253f846a77b75280
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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This patch adds a new TFTF framework API `tftf_set_deepest_pstate_idx`
which sets the pstate indices corresponding to the deepest pstate at
a given power level for a platform. These indices can then be used to
construct the full `power_state` parameter using `tftf_get_pstate_vars()`
helper function.
Change-Id: Ie5c5ad1dd056c45f69f553d5cfadc6d33b4ef945
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Added `plat_arm_gic_init` and documented it.
The functions tftf_platform_setup, tftf_plat_arch_setup and
tftf_early_platform_setup have been made common and placed in
arm_setup.c.
Moved PL011 baudrate definition to its header file.
Porting Guide updated.
Change-Id: I42af9218160bc3bbc7a5acb267bba8d9cdc3c985
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They only contain functions that aren't implemented anywhere.
Change-Id: I6d0d17e7529e0ce4c010e0caa84f40cf47583f4a
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Extracted the IO code from all platform ports and placed it in
plat/arm/common/arm_io_storage.c.
Removed the original files and modified the Makefiles to point at the
new common file.
Change-Id: I2e7f38cbabe1d351d4c87b7710d407e1e0fe0dbf
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Added `plat_fwu_io_setup`, which is defined for arm platforms.
Added it to the documentation.
Renamed `arm_io_setup()` to `arm_fwu_io_setup()` and made it a weak
function. Removed the `plat_arm_io_setup()` associated to it because
this is not platform code and it's problematic for the actual
`plat_arm_io_setup()` that will be implemented in a following patch.
`plat_fwu_io_setup` calls `arm_fwu_io_storage` in ARM platforms.
Change-Id: Ibfb63139a6c0b0991ab70e935a3723d454d8d70c
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Extracted the timer code from the FVP, Armstrong and Ashbrook
platform ports and placed it in plat/arm/board/common/arm_timers.c
Removed the original timer code files and modified the Makefiles to
point at the new common file.
The Juno port remains unchanged.
Change-Id: Ifdf4e5631dcf58702eaa12242999a54e6038d713
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Instead of adding all the platform files from each platform.mk, only
add the ones that are actually platform-specific.
Change-Id: I1c9722ce1ab4115cb639115cfef670867ee189b1
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Paths inside platform makefiles updated.
Change-Id: Ic8fc4a9e4c24208d3b6ed6a11b38335fa2f1a8b0
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This patch adds the necessary support to Makefiles in TFTF
to enable build for AArch32.
Change-Id: Ie8dae9323982f1f8d07192de67292c7e262bca07
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This patch adds the TFTF framework support for AArch32. TFTF runs
in HYP mode when compiled for AArch32. The entrypoint, exception
and architecture files are added as part of this patch.
Change-Id: I24d8e6eff9411c2bc536e0ad45f4e375d6e56101
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This patch pulls in required AArch32 support from ARM Trusted
Firmware. The previous `spinlock.S` file which was AArch64 specific is
now moved into the `aarch64` folder. The `asm_macros.S` file has been
refactored and the common macros are moved to a new file
`asm_macros_common.S`. The makefiles are also updated for these changes.
Change-Id: I46e5f7472ee1025b158c3587e7dc12210425f929
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This patch moves the `make_mpid` utility function from arch.h
to tftf_lib.h as it is not architecture-specific. Also this
patch removes the inclusion of `assert.h` and `stdint.h` by
arch.h. The files affected by these changes are also corrected.
Change-Id: I216f3bb763002b661e40c60dbf8f9bfd5cf2f7a2
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The functions implemented in plat_common.c can be easily
reused between architectures with minor modification. Hence
this patch moves the file out of the `aarch64` to its parent
directory. The corresponding makefiles are also modified.
Change-Id: Ia77129f14497f3a5801735bf753afc5c6a6f77e3
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This patch fixes the types in console and pl011 driver and also moves
the `pl011_console.S` to AArch64 specific folder. The patch also modifies
the pl011 console initialization to disables the UART prior to configuration.
The platform makefiles are also modified for the new driver location.
Change-Id: Ic4acacd200432e61fbeb20f2d3148683764338e4
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This patch adds a new mandatory platform porting macro
`PLAT_MAX_PWR_STATES_PER_LVL` to the platform_def.h files of
all the platforms. This macro enables PSCI STAT test cases to
size the array which will be used to store statistics queried
from the firmware. As the name suggests, the value of this
macro is the maximum number of power states at each power
domain level of the platform.
Change-Id: I7038d5e62401e81157a6816567cbea35aa8db819
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This patch removes the unused `platform_check_mpidr()` platform
API from TFTF.
Change-Id: Iee51456d1c1571e027d6fcd87e9cb576dfc7835f
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